Datenblatt-pdf.com

E142AHF Schematic ( Datenblatt PDF ) - Semtech Corporation

Teilenummer E142AHF
Beschreibung Per Pin timing Deskew w 4x2 Cross Point Switch
Hersteller Semtech Corporation
Logo Semtech Corporation Logo 

Gesamt 19 Seiten
		
E142AHF Datasheet, Funktion
EDGE HIGH-PERFORMANCE PRODUCTS
Description
Edge142
Per Pin timing Deskew w 4x2
Cross Point Switch
Features
The Edge142 is a 4 X 2 cross point switch with output
edge deskew capability. Manufactured in a high
performance bipolar process, it is designed primarily for
channel deskew applications in VLSI and Mixed-Signal
test equipment.
Any of the four input signals may be selected as the
source for either output. The 142 performs test head
multiplexing, adjacent channel multiplexing, and signal
buffering for both the drive and receive signals, in addition
to timing deskew.
• Very Narrow (<1 ns) Pulse Width Capability
• Fmax > 850 MHz
• Independent Delay Adjustments for Positive and
Negative Transitions
• Delay Range of 1.5 ns
• Trailing Edge Adjust Range of 300 ps
• Small Footprint: 52-pin MQFP Package
(10 X 10 mm) with Internal Heat Spreader or
Die Form
The delay value (and resolution) is controlled via an
external voltage DAC. The delay element is designed
specifically to be monotonic and very stable while
delaying a very narrow pulse over a limited delay range.
Applications
The part offers separate delays for rising vs. falling edges.
The rising edge delay range is 1.5 ns and the falling
edge adjustment range is 300 ps.
The Edge142 is also well suited for 1:2 or 1:4 signal
fanout applications that require:
- multiple signal sources
- output enable / disable
- timing deskew on the output
signals.
• Automatic Test Equipment
– Per pin deskew in VLSI, Mixed-Signal, and Memory
Testers
– Clock Distribution with timing adjustment
Functional Block Diagram
VDELAY 0
VFALL 0
IN0 / 0*
IN1 / 1*
IN2 / 2*
IN3 / 3*
4X2
T
T
OUT0 / 0*
MUX OUT0 / 0*
MUX OUT1 / 1*
OUT1 / 1*
Revision 1, February 14, 2000
VFALL 1
VDELAY 1
1
www.semtech.com






E142AHF Datasheet, Funktion
Edge142
EDGE HIGH-PERFORMANCE PRODUCTS
Circuit Description (continued)
Falling Edge Adjust
Default Conditions
VFALL allows independent adjustment of the falling edge
(see Figure 3). The propagation delay for a falling edge
is defined as
Tpd- = Tpd(nom) + Tspan + Tfall
where Tfall is defined as the additional delay incurred by
adjusting the VFALL input. Notice that Tfall can be either
positive or negative over a ± 150 ps range, depending
on where VMID is set. This flexibility allows the part to
either expand or contract an input signal .
All digital inputs have either an internal pull up (to ground)
or pull down (to VEE) resistor (~50 K) to protect against
floating inputs migrating to an indeterminant state. All
differential timing inputs are pulled to a logical zero state.
All operating mode control inputs are pulled down to a
logical zero. The mux select and mux enable inputs
have pull down resistors to VEE. And the output enable
is pulled up to ground.
The following chart summarizes the internal state of the
digital inputs.
Notice also that Tpd+ is a function of VDELAY only, while
Tpd- is a function of VDELAY and VFALL. The transfer
function for Tspan vs. VDELAY is shown in Figure 4. The
transfer function for Tfall vs. VFALL is shown in Figure 5.
VMID
VMID is used in conjuction with VFALL to remove any
systematic pulse width expansion or contraction. VMID
and VFALL are differential analog voltage inputs which
affect the falling edge delay.
Input
Internal Resistor
IN0, IN1, IN2, IN3
Pull Down to VEE
IN0*, IN1*, IN2*, IN3* Pull up to GND
S00, S10, S01, S11 Pull Down to VEE
MUX0 SEL, MUX1 SEL Pull Down to VEE
MUX EN
Pull Down to VEE
EN* Pull up to GND
When VFALL equals VMID, there will be no programmed
pulse width variation between the input and the output
signal. It is the difference between VMID and VFALL
that expands or contracts a pulse.
However, despite the internal resistors providing a known
default condition, it is recommended that no unused
inputs be left floating.
VMID should be statically established at the midpoint of
the voltage swing of VFALL.
Programming Sequence
INPUT
VFALL = +0.1V
VFALL = –1.3V
VDELAY, in addition to affecting the placement of the
rising edge, also affects the falling edge. Therefore, when
calibrating a system, VDELAY should be adjusted first.
As VFALL affects only the falling edge, it should be
adjusted after VDELAY is established.
OUTPUT
(–1.3V < VDELAY < +0.1V)
TPDmin + Tspan
TPDmin + Tspan + Tfall
Figure 3. Falling Edge Control
2000 Semtech Corp.
6
www.semtech.com

6 Page







E142AHF pdf, datenblatt
EDGE HIGH-PERFORMANCE PRODUCTS
Application Information (continued)
Edge142
Prop Delay vs. Frequency
The 142 shows very little change in propagation delay
vs. frequency. The following three charts show the
variation in the prop delay of a rising edge and a falling
edge as the frequency is varied over a wide range.
The first chart shows the Motorola 10EL11 clock
spreader timing error for both the rising and falling edge
with the input frequency varied from .5 MHz to 300 MHz.
This information is used as a reference to compare the
142 against.
The second and third charts show the 142 under identical
conditions. The data is broken out into one chart for the
rising edge and a separate chart for the falling edge. In
addition, the timing error is listed over the entire delay
range of the 142.
EL11 Clock Spreader Tpd vs. Frequency
30
20
10
0
-10
-20
0.5 10 20 50 75 100 125 150 200 250 300
Frequency [MHz]
Edge142 TPD+ Error vs. Frequency
V E E = - 5 . 2 V VFALL & VMID=-0.6V
30
20
10
0
-10
-20
0.5 10 20 50 75 100 125 150 200 250 300
Frequency [MHz]
Tpd+ Error
Tpd- Error
VD=+0.1V
VD=-0.1V
VD=-0.3V
VD=-0.5V
VD=-0.7V
VD=-0.9V
VD=-1.1V
VD=-1.3V
Edge142 TPD- Error vs. Frequency
V E E = - 5 . 2 V VFALL & VMID=-0.6V
30
20
10
0
-10
-20
0.5 10 20 50 75 100 125 150 200 250 300
Frequency [MHz]
VD=+0.1V
VD=-0.1V
VD=-0.3V
VD=-0.5V
VD=-0.7V
VD=-0.9V
VD=-1.1V
VD=-1.3V
2000 Semtech Corp.
12
www.semtech.com

12 Page


SeitenGesamt 19 Seiten
PDF Download[ E142AHF.PDF ]

Link teilen




Besondere Datenblatt

TeilenummerBeschreibungHersteller
E142AHFPer Pin timing Deskew w 4x2 Cross Point SwitchSemtech Corporation
Semtech Corporation

TeilenummerBeschreibungHersteller
CD40175BC

Hex D-Type Flip-Flop / Quad D-Type Flip-Flop.

Fairchild Semiconductor
Fairchild Semiconductor
KTD1146

EPITAXIAL PLANAR NPN TRANSISTOR.

KEC
KEC


www.Datenblatt-PDF.com    |   2019   |  Kontakt  |   Suche