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DS2720AU Schematic ( PDF Datasheet ) - Dallas Semiconducotr

Teilenummer DS2720AU
Beschreibung Efficient/ Addressable Single-Cell Rechargeable Lithium Protection IC
Hersteller Dallas Semiconducotr
Logo Dallas Semiconducotr Logo 




Gesamt 21 Seiten
DS2720AU Datasheet, Funktion
www.maxim-ic.com
FEATURES
§ Rechargeable Lithium-Ion (Li+) Safety
Circuit
- Overvoltage Protection
- Overcurrent/Short-Circuit Protection
- Undervoltage Protection
- Overtemperature Protection
§ Controls High-Side N-Channel Power
MOSFETs Driven from 9V Charge Pump
§ System Power Management and Control
Feature Support
§ Eight Bytes of Lockable EEPROM
§ Dallas 1-Wire® Interface with Unique 64-Bit
Device Address
§ 8-Pin mSOP Package
§ Low Power Consumption:
- Active Current: 12.5mA typ
- Sleep Current: 1.5mA typ
DS2720
Efficient, Addressable Single-Cell
Rechargeable Lithium Protection IC
PIN CONFIGURATION
PLS
PS
DQ
VSS
1
2
3
4
8 CP
7 DC
6 CC
5 VDD
DS2720U
mSOP
PIN DESCRIPTION
PLS - Battery-Pack Positive Terminal Input
PS - Power-Switch Sense Input
DQ - Data Input/Output
VSS - Device Ground
VDD - Power-Supply Input
CP - Reservoir Capacitor
CC - Charge Control Output
DC - Discharge Control Output
DESCRIPTION
The DS2720 single-cell rechargeable Li+ protection IC provides electronic safety functions required for
rechargeable Li+ applications including protecting the battery during charge, protection of the circuit
from damage during periods of excess current flow and maximization of battery life by limiting the level
of cell depletion. Protection is facilitated by electronically disconnecting the charge and discharge
conduction path with switching devices such as low-cost N-channel power MOSFETs.
Since the DS2720 provides high-side drive to external N-channel protection MOSFETs from a 9V charge
pump, superior on-resistance performance results compared to common low-side protector circuits using
the same FETs. The FET on-resistance actually decreases as the battery discharges.
Adding to the uniqueness of the DS2720 is the ability of the system to control the FETs from either the
data interface or a dedicated input thereby eliminating the power-switch control redundancy of
rechargeable Li+ battery systems.
Through its 1-Wire interface, the DS2720 gives the host system read/write access to status and control
registers, instrumentation registers, and general-purpose data storage. Each device has a factory-
programmed 64-bit net address that allows it to be individually addressed by the host system.
1-Wire is a registered trademark of Dallas Semiconductor.
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DS2720AU Datasheet, Funktion
DS2720
Overvoltage. If the cell voltage sensed at VDD exceeds overvoltage threshold VOV for a period longer
than overvoltage delay tOVD, the DS2720 shuts off the external charge FET and sets the OV flag in the
protection register. Discharging remains enabled during overvoltage. The charge FET is re-enabled
(unless another protection condition prevents it), when the cell voltage falls below charge enable
threshold VCE, or a discharge causes VDD - VPLS > VOC.
Undervoltage. If the cell voltage sensed at VDD drops below undervoltage threshold VUV for a period
longer than undervoltage delay tUVD, the DS2720 shuts off the charge and discharge FETs, sets the UV
flag in the protection register, and enters sleep mode. The DS2720 turns on both the charge and discharge
FETs after the cell voltage rises above VUV and a charger is present.
Short Circuit. If the cell voltage sensed at VDD drops below depletion threshold VSC for a period of tSCD,
the DS2720 shuts off the charge and discharge FETs and sets the DOC flag in the protection register. The
current path through the charge and discharge FETs is not re-established until the voltage on PLS rises
above VDD - VOC. The DS2720 provides a test current through internal resistor RTST from VDD to PLS to
pull up PLS when VDD rises above VSC. The test current allows the DS2720 to detect the removal of the
offending low-impedance load. Additionally, a recovery charge path through RTST from PLS to VDD is
enabled.
Overcurrent. If the voltage across the protection FETs (VDD - VPLS) is greater than VOC for a period
longer than tOCD, the DS2720 shuts off the external charge and discharge FETs and sets the DOC flag in
the protection register. The current path is not re-established until the voltage on PLS rises above VDD -
VOC. The DS2720 provides a test current through internal resistor RTST from VDD to PLS to detect the
removal of the offending low-impedance load.
Overtemperature. If the device temperature exceeds TMAX, the DS2720 immediately shuts off the
external discharge and charge FETs. The FETs are not turned back on until the cell temperature drops
below TMAX AND the host resets the OT bit.
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DS2720AU pdf, datenblatt
Figure 8. 1-WIRE NET ADDRESS FORMAT
8-Bit CRC
48-Bit Serial Number
MSb
8-Bit Family
Code (31h)
LSb
DS2720
CRC GENERATION
The DS2720 has an 8-bit cyclic redundancy check (CRC) stored in the most significant byte of its 1-Wire
net address. To ensure error-free transmission of the address, the host system can compute a CRC value
from the first 56 bits of the address and compare it to the CRC from the DS2720. The host system is
responsible for verifying the CRC value and taking action as a result. The DS2720 does not compare
CRC values and does not prevent a command sequence from proceeding as a result of a CRC mismatch.
Proper use of the CRC can result in a communication channel with a very high level of integrity.
The CRC can be generated by the host using a circuit consisting of a shift register and XOR gates as
shown in Figure 9, or it can be generated in software. Additional information about the Dallas 1-Wire
CRC is available in Application Note 27, Understanding and Using Cyclic Redundancy Checks with
Dallas Semiconductor Touch Memory Products.
In the circuit in Figure 9, the shift register bits are initialized to 0. Then, starting with the least significant
bit of the family code, one bit at a time is shifted in. After the 8th bit of the family code has been entered,
then the serial number is entered. After the 48th bit of the serial number has been entered, the shift
register contains the CRC value.
Figure 9. 1-WIRE CRC GENERATION BLOCK DIAGRAM
MSb
XOR
XOR
INPUT
LSb
XOR
HARDWARE CONFIGURATION
Because the 1-Wire bus has only a single line, it is important that each device on the bus be able to drive
it at the appropriate time. To facilitate this, each device attached to the 1-Wire bus must connect to the
bus with open-drain or tri-state output drivers. The DS2720 uses an open-drain output driver as part of the
bidirectional interface circuitry shown in Figure 10. If a bidirectional pin is not available on the bus
master, separate output and input pins can be connected together.
The 1-Wire bus must have a pullup resistor at the bus-master end of the bus. For short line lengths, the
value of this resistor should be approximately 5kW. The idle state for the 1-Wire bus is high. If, for any
reason, a bus transaction must be suspended, the bus must be left in the idle state in order to properly
resume the transaction later. If the bus is left low for more than 120ms, slave devices on the bus begin to
interpret the low period as a reset pulse, effectively terminating the transaction.
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