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PDF DS26C32AT Data sheet ( Hoja de datos )
| Número de pieza | DS26C32AT | |
| Descripción | Quad Differential Line Receiver | |
| Fabricantes | National Semiconductor | |
| Logotipo |  |
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June 1998
DS26C32AT/DS26C32AM
Quad Differential Line Receiver
General Description
The DS26C32A is a quad differential line receiver designed
to meet the RS-422, RS-423, and Federal Standards 1020
and 1030 for balanced and unbalanced digital data transmis-
sion, while retaining the low power characteristics of CMOS.
The DS26C32A has an input sensitivity of 200 mV over the
common mode input voltage range of ±7V. The DS26C32A
features internal pull-up and pull-down resistors which pre-
vent output oscillation on unused channels.
The DS26C32A provides an enable and disable function
common to all four receivers, and features TRI-STATE ® out-
puts with 6 mA source and sink capability. This product is pin
compatible with the DS26LS32A and the AM26LS32.
Features
n CMOS design for low power
n ±0.2V sensitivity over input common mode voltage
range
n Typical propagation delays: 19 ns
n Typical input hysteresis: 60 mV
n Inputs won’t load line when VCC = 0V
n Meets the requirements of EIA standard RS-422
n TRI-STATE outputs for connection to system buses
n Available in Surface Mount
n Mil-Std-883C compliant
Logic Diagram
Connection Diagrams
Dual-In-Line Package
DS008764-1
20-Lead Ceramic Leadless Chip Carrier
DS008764-2
Top View
Order Number DS26C32ATM or DS26C32ATN
See NS Package M16A or N16E
For Complete Military Product Specifications,
refer to the appropriate SMD or MDS.
Order Number DS26C32AME/883, DS26C32AMJ/883 or
DS26C32AMW/883
See NS Package E20A, J16A or W16A
TRI-STATE® is a registered trademark of National Semiconductor Corporation.
© 1998 National Semiconductor Corporation DS008764
DS008764-12
www.national.com
1 page  
AC Test Circuit and Switching Time Waveforms (Continued)
DS008764-8
FIGURE 6. Enable and Disable Times for “LS-Type” Load (Notes 8, 9)
Note 7: Diagram shown for ENABLE low.
Note 8: S1 and S2 of load circuit are closed except where shown.
Note 9: Pulse generator for all pulses: Rate ≤ 1.0 MHz; ZO = 50Ω; tr ≤ 15 ns; t f ≤ 6.0 ns.
Truth Table
ENABLE ENABLE
LH
All Other
Combinations of
Enable Inputs
Z = TRI-STATE
Input
X
VID ≥ V TH (Max)
VID ≤ V TH (Min)
Open
Output
Z
H
L
H
Typical Applications
Two-Wire Balanced Systems, RS-422
Typical Performance Characteristics
Differential Propagation Delay
vs Temperature
Differential Propagation Delay
vs Power Supply Voltage
DS008764-9
Differential Skew vs
Temperature
DS008764-13
DS008764-14
5
DS008764-15
www.national.com
5 Page | ||
| Páginas | Total 10 Páginas | |
| PDF Descargar | [ Datasheet DS26C32AT.PDF ] | |
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| DS26C32AT | Quad Differential Line Receiver | National Semiconductor |
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