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PDF CXK5V8257BTM-70LL Data sheet ( Hoja de datos )

Número de pieza CXK5V8257BTM-70LL
Descripción 32768-word X 8-bit High Speed CMOS Static RAM
Fabricantes Sony Corporation 
Logotipo Sony Corporation Logotipo



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No Preview Available ! CXK5V8257BTM-70LL Hoja de datos, Descripción, Manual

CXK5V8257BTM/BYM/BM -70LL/10LL
32768-word × 8-bit High Speed CMOS Static RAM
For the availability of this product, please contact the sales office.
Description
The CXK5V8257BTM/BYM/BM is 262,144 bits
high speed CMOS static RAM organized as 32768-
CXK5V8257BTM
28 pin TSOP (Plastic)
CXK5V8257BYM
28 pin TSOP (Plastic)
words by 8 bits.
A polysilicon TFT cell technology realized extermely
low stand-by current and higher data retention stability.
Operating on a single 3.3V supply, directly LVTTL
compatible (All inputs and outputs).
And special feature are, low power consumption,
high speed and broad package line-up.
CXK5V8257BM
The CXK5V8257BTM/BYM/BM is a suitable RAM
28 pin SOP (Plastic)
for portable equipment with battery back up.
Features
Single +3.3V supply: 3.3V ±0.3V
Directly LVTTL compatible: All inputs and outputs
Fast access time:
(Access time)
CXK5V8257BTM/BYM/BM
-70LL
70ns (Max.)
-10LL
100ns (Max.)
Low standby current:
CXK5V8257BTM/BYM/BM
-70LL/10LL
3.5µA (Max.)
Low power data retention: 2.0V (Min.)
Available in many packages
CXK5V8257BTM/BYM 8mm × 13.4mm 28 pin
TSOP Package
CXK5V8257BM
450mil 28 pin
SOP Package
Function
32768-word × 8 bit static RAM
Structure
Silicon gate CMOS IC
Block Diagram
A14
A13
A12
A11
A9
A8
A7
Buffer
Row
Decoder
Memory
Matrix
512 × 512
VCC
GND
A6
A5
A10
A4
A3
A2
Buffer
A1
A0
OE
Buffer
WE
CE
I /O Gate
Column
Decoder
I /O Buffer
I /O1 I /O8
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
–1–
E93836A5Z-ST

1 page




CXK5V8257BTM-70LL pdf
Timing Waveform
• Read cycle (1): CE = OE = VIL, WE = VIH
Address
Data out
tAA
tOH
Previous data valid
tRC
• Read cycle (2): WE = VIH
Address
CE
OE
Data out
tRC
tAA
tCO
tLZ
tOLZ
tOE
High impedance
Data valid
tHZ
tOHZ
Data valid
CXK5V8257BTM/BYM/BM
• Write cycle (1): WE control
Address
OE
CE
WE
Data in
Data out
tAS
(2)
tWC
tWR
tAW
tCW
(1)
tWP
tWHZ
tDW tDH
Data valid
tOW
High impedance
(2)
–5–

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