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PDF CXB1567Q Data sheet ( Hoja de datos )

Número de pieza CXB1567Q
Descripción Limiting Amplifier for Optical Fiber Communication Receiver
Fabricantes Sony Corporation 
Logotipo Sony Corporation Logotipo



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CXB1567Q
Limiting Amplifier for Optical Fiber Communication Receiver
For the availability of this product, please contact the sales office.
Description
The CXB1567Q achieves the 2R optical-fiber
48 pin QFP (Plastic)
communication receiver functions (Reshaping and
Regenerating) on a single chip. This IC is also
equipped with the signal interruption alarm output
function, which is used to discriminate the existence
of data input.
Features
Auto-offset canceller circuit
Signal interruption alarm outputs
Single 5V power supply
Applications
• SONET/SDH: 622.08Mb/s
• Fiber channel: 531.25Mb/s
Absolute Maximum Ratings
• Power supply
VCC – VEE
• Storage temperature
Tstg
• Input voltage difference: | VD – VD |
Vdif
• Input voltage
Vi
• Output current
(Continuous) IO
(Surge current)
–0.3 to +7.0
–65 to +150
V
°C
0.0 to +2.5
–0.3 to VCC
V
V
0 to 50
0 to 100
mA
mA
Recommended Operating Conditions
Supply voltage
VCC – VEE
Operating temperature
Ta
Termination resistor (Q/Q)
RT1
Termination resistor (SD/SD)
RT2
Termination voltage
VCC – VTT
5.0 ± 0.5
–40 to +85
45 to 55
45 to 55
1.8 to 2.2
V
°C
V
Structure
Bipolar silicon monolithic IC
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
–1–
E94709A63-ST

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CXB1567Q pdf
CXB1567Q
Typical pin
Pin
No.
Symbol voltage (V)
DC AC
Equivalent circuit
43 UP –4.7V
44 DOWN –5V
1k
100 100
5k
43 5k
44
45 VCCA 0V
46 VEEA –5V
47, 48 N.C.
Description
VCCA
VEEA
Resistor connection pins for alarm
level setting.
UP pin When the
resistance
connected to this
pin is increased, the
alarm level
becomes higher.
DOWN pin Normally
connect this pin
to VEE.
Positive power supply pin for
analog block.
Negative power supply pin for
analog block.
No connection.
–5–

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CXB1567Q arduino
CXB1567Q
2. Alarm block
As shown in Fig. 3, the alarm block requires external resistor REX1 for alarm level setting and peak hold
capacitor C3. When the resistance value provided for resistor REX1 is increased, the alarm setting level rises.
When the resistance value provided for REX2 is increased, the alarm setting level lowers. However, the voltage
of Pin 43 should always be higher than that of Pin 44. Normally, short-circuit Pin 44 to VEE (REX2 = 0). See
Fig. 5 for the alarm setting level. In the relationship between the alarm setting level and hysteresis width, the
hysteresis width is designed to maintain a constant gain (design target value: 6dB) as shown in Fig. 4.
External capacitors C3 are used for input signal and alarm level peak hold capacitance. The C3 capacitance
value should be set so as to obtain desired assert time and deassert time settings for the alarm signal. The
deassert time becomes smaller by connecting resistor R10 between VEE and Pin 5 and resistor R11 between
VEE and Pin 6. The REX1 and C3 typical values are indicated below. (A capacitance of approximately 10pF is
built in Pins 5 and 6 respectively.)
REX1:
C3:
273(VDAS = 3mVpp)
2000pF
VCCA
R7 1k
R8 100 R8 100
R7, R8, and R9 values
are typical values.
IC interior
IC exterior
R9 5k R9 5k
43 44
REX1
REX2
From
Limiting
amplifier
Peak hold
Peak hold
SD
SD
10p
VccA
6
R10 C3
10p
VccA
5
C3 R11
VEE
VEE
Fig. 3
VEE Vcc
Vcc VEE
24
High
level
Low
level
0
VDAS deassert level
VAS assert level
VDAS
VAS
Hysteresis width Input amplitude
20
log
(
VAS
VDAS
) = 6.0 dB
Fig. 4
20
16
12
8
4
0
0
200
– 11 –
VAS
VDAS
400 600 800
REX1 ()
Fig. 5
1000
1200

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