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PDF CXA3286R Data sheet ( Hoja de datos )
| Número de pieza | CXA3286R | |
| Descripción | 8-bit 160MSPS Flash A/D Converter | |
| Fabricantes | Sony Corporation | |
| Logotipo |  |
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CXA3286R
8-bit 160MSPS Flash A/D Converter
Description
The CXA3286R is an 8-bit high-speed flash A/D
converter capable of digitizing analog signals at the
maximum rate of 160MSPS. ECL, PECL or TTL can
be selected as the digital input level in accordance
with the application. The TTL digital output level
allows 1: 2 demultiplexed output.
48 pin LQFP (Plastic)
Features
• Differential linearity error: ±0.5LSB or less
• Integral linearity error: ±0.5LSB or less
• Maximum conversion rate of 160MSPS
• Low input capacitance: 10pF
• Power saving function
• Wide analog input bandwidth: 250MHz
• Low power consumption: 550mW
• 1: 2 demultiplexed output
• 1/2 frequency-divided clock output
(with reset function)
• Compatible with ECL, PECL and TTL digital input
levels
• TTL output "H" levels: 2.8V (Typ.)
• Output voltage control function (VOCLP)
• +3.3V line CMOS IC direct connecting available
• Single +5V power supply operation available
• Ultra-small surface mounting package (48-pin LQFP)
LEAD TREATMENT: PALLADIUM PLATING
Structure
Bipolar silicon monolithic IC
Applications
• LCD monitors
• LCD projectors
Pin Configuration (Top View)
12 11 10 9 8 7 6 5 4 3 2 1
CLK/E 13
48 RESETN/E
CLKN/E 14
47 RESET/E
CLK/T 15
46 RESETN/T
SELECT2 16
45 SELECT1
VOCLP 17
44 INV
PS 18
43 CLKOUT
DVCC2 19
42 DVCC2
DGND2 20
41 DGND2
PAD0 21
40 PBD7
PAD1 22
39 PBD6
PAD2 23
38 PBD5
PAD3 24
37 PBD4
25 26 27 28 29 30 31 32 33 34 35 36
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
–1–
E98774-PS
1 page  
CXA3286R
Pin Description and I/O Pin Equivalent Circuit
Pin
No.
Symbol
I/O
Standard
voltage level
Equivalent circuit
3, 10 AGND
GND
5, 8 AVCC
20, 29 DGND1
32, 41 DGND2
19, 30 DVCC1
31, 42 DVCC2
12 DGND3
1 DVEE3
+5V
(typ.)
GND
+5V
(typ.)
+5V (typ.)
(With a
single
power
supply)
GND
(With dual
power
supply)
GND
(With a
single
power
supply)
–5V (typ.)
(With dual
power
supply)
Description
Analog ground.
Separated from the digital ground.
Analog power supply.
Separated from the digital power
supply.
Digital ground.
Digital power supply.
Digital power supply.
Ground for ECL input.
+5V for PECL and TTL inputs.
Digital power supply.
–5V for ECL input.
Ground for PECL and TTL inputs.
16 SELECT2 I
DVcc1
or
Open
or
DGND1
DVCC1
16
DGND1
r
r
r
Data output switching.
When left open, data are output
from both PA and PB side output
ports.
For DVcc1 level, PA side output port
outputs data and PB side is in the
high impedance state.
For DGND1 Ievel, PB side output
port outputs data and PA side is in
the high impedance state.
17 VOCLP
I
Clamp
voltage
DVCC2 TTL output high level clamping.
The TTL high level voltage is
3k clamped to the value almost
equivalent to the voltage applied to
17 this pin .
Even if this pin is left open, the TTL
3.5k high level is clamped to
DGND2 approximately 2.8V.
–5–
5 Page 
CXA3286R
Electrical Characteristics Measurement Circuit
Sampling Delay Measurement Circuit
Current Consumption Measurement Circuit
5V 5V
Aperture Jitter Measurement Circuit
100MHz
Amp
A Icc
A IEE
OSC1
φ: Variable
4V VRT
AVCC
DVCC1
DVCC2
PS
DGND3
VIN 8
fr CXA3286R
CLK
1.95V
VIN
CLK/E
5MHz PECL
OSC2
Logic
Analizer
1024
samples
2V VRB
DGND2
DGND1
AGND
DVEE3
100MHz
ECL
Buffer
Integral Linearity Error Measurement Circuit
Differential Linearity Error Measurement Circuit
+V
S2
S1: ON when A < B
S1 S2: ON when A > B
Aperture Jitter Measurement Method
VIN
CLK
VRT
VRM2
VRB
VIN
DVM
8
CXA3286R
–V
A<B A>B
Comparator
A8 B8 8
to to
A1 B1
A0 B0
“0” “1”
Controller
Buffer
000 ··· 00
to
111 ··· 10
Error Rate Measurement Circuit
∆u 129
∆t
VIN
128
127
σ (LSB)
126
125
CLK Sampling timing fluctuation
(= aperture jitter)
Where σ (LSB) is the deviation of the output codes when
the largest slew rate point is sampled at the clock which
has exactly the same frequency as the analog input
signal, the aperture jitter Taj is:
Taj = σ/
∆υ
∆t
= σ/ ( 256
2
× 2πf )
Signal
Source
VIN
Fc
N
– 1kHz
2Vp-p Sin Wave
CXA3286R
8
Latch
CLK CLK
A
B
Comparator
A>B
+ Latch
Pulse
Counter
Signal
Source
Fc
16LSB
1/N
– 11 –
11 Page | ||
| Páginas | Total 23 Páginas | |
| PDF Descargar | [ Datasheet CXA3286R.PDF ] | |
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