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DAC714P Schematic ( PDF Datasheet ) - Burr-Brown Corporation

Teilenummer DAC714P
Beschreibung 16-Bit DIGITAL-TO-ANALOG CONVERTER With Serial Data Interface
Hersteller Burr-Brown Corporation
Logo Burr-Brown Corporation Logo 




Gesamt 14 Seiten
DAC714P Datasheet, Funktion
® DAC714
16-Bit DIGITAL-TO-ANALOG CONVERTER
With Serial Data Interface
FEATURES:
q SERIAL DIGITAL INTERFACE
q VOLTAGE OUTPUT: ±10V, ±5V, 0 to +10V
q ±1 LSB INTEGRAL LINEARITY
q 16-BIT MONOTONIC OVER TEMPERATURE
q PRECISION INTERNAL REFERENCE
q LOW NOISE: 120nV/Hz Including Reference
q 16-LEAD PLASTIC AND CERAMIC SKINNY
DIP AND PLASTIC SOIC PACKAGES
DESCRIPTION
The DAC714 is a complete monolithic digital-to-
analog converter including a +10V temperature com-
pensated reference, current-to-voltage amplifier, a
high-speed synchronous serial interface, a serial out-
put which allows cascading multiple converters, and
an asynchronous clear function which immediately
sets the output voltage to midscale.
The output voltage range is ±10V, ±5V, or 0 to +10V
while operating from ±12V or ±15V supplies. The
gain and bipolar offset adjustments are designed so
that they can be set via external potentiometers or
external D/A converters. The output amplifier is pro-
tected against short circuit to ground.
The 16-pin DAC714 is available in a plastic 0.3" DIP,
ceramic 0.3" CERDIP, and wide-body plastic SOIC
package. The DAC714P, U, HB, and HC are specified
over the –40°C to +85°C temperature range while the
DAC714HL is specified over the 0°C to +70°C range.
A0
A1
SDI
CLK
CLR
Reference
Circuit
Input Shift Register
16
D/A Latch
16
16-Bit D/A Converter
SDO
RFB2
VOUT
Gain
Adjust
VREF OUT
+10V
RBPO
Offset Adjust
International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 • Twx: 910-952-1111
Internet: http://www.burr-brown.com/ • FAXLine: (800) 548-6133 (US/Canada Only) • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132
© 1994 Burr-Brown Corporation
PDS-11252D
DAC714Printed in U.S.A. July, 1997
®






DAC714P Datasheet, Funktion
DISCUSSION OF
SPECIFICATIONS
LINEARITY ERROR
Linearity error is defined as the deviation of the analog
output from a straight line drawn between the end points of
the transfer characteristic.
DIFFERENTIAL LINEARITY ERROR
Differential linearity error (DLE) is the deviation from
1LSB of an output change from one adjacent state to the
next. A DLE specification of ±1/2LSB means that the output
step size can range from 1/2LSB to 3/2LSB when the digital
input code changes from one code word to the adjacent code
word. If the DLE is more positive than –1LSB, the D/A is
said to be monotonic.
MONOTONICITY
A D/A converter is monotonic if the output either increases
or remains the same for increasing digital input values.
Monotonicity of the C and L grades is guaranteed over the
specification temperature range to 16 bits.
SETTLING TIME
Settling time is the total time (including slew time) for the
D/A output to settle to within an error band around its final
value after a change in input. Settling times are specified to
within ±0.003% of Full Scale Range (FSR) for an output
step change of 20V and 1LSB. The 1LSB change is mea-
sured at the Major Carry (FFFFH to 0000H, and 0000H to
FFFFH: BTC codes), the input transition at which worst-case
settling time occurs.
TOTAL HARMONIC DISTORTION
Total harmonic distortion is defined as the ratio of the
square root of the sum of the squares of the values of the
harmonics to the value of the fundamental frequency. It is
expressed in % of the fundamental frequency amplitude at
sampling rate fS.
SIGNAL-TO-NOISE
AND DISTORTION RATIO (SINAD)
SINAD includes all the harmonic and outstanding spurious
components in the definition of output noise power in
addition to quantizing and internal random noise power.
SINAD is expressed in dB at a specified input frequency and
sampling rate, fS.
DIGITAL-TO-ANALOG GLITCH IMPULSE
The amount of charge injected into the analog output from
the digital inputs when the inputs change state. It is mea-
sured at half scale at the input codes where as many as
possible switches change state—from 0000H to FFFFH.
DIGITAL FEEDTHROUGH
When the A/D is not selected, high frequency logic activity
on the digital inputs is coupled through the device and shows
up as output noise. This noise is digital feedthrough.
OPERATION
The DAC714 is a monolithic integrated-circuit 16-bit D/A
converter complete with 16-bit D/A switches and ladder
network, voltage reference, output amplifier and a serial
interface.
INTERFACE LOGIC
The DAC714 has double-buffered data latches. The input
data latch holds a 16-bit data word before loading it into the
second latch, the D/A latch. This double-buffered organiza-
tion permits simultaneous update of several D/A converters.
All digital control inputs are active low. Refer to the block
diagram shown in Figure 1.
All latches are level-triggered. Data present when the enable
inputs are logic “0” will enter the latch. When the enable
inputs return to logic “1”, the data is latched.
The CLR input resets both the input latch and the D/A latch
to 0000H (midscale).
LOGIC INPUT COMPATIBILITY
The DAC714 digital inputs are TTL compatible (1.4V switch-
ing level), low leakage, and high impedance. Thus the inputs
are suitable for being driven by any type of 5V logic Family,
such as CMOS. An equivalent circuit for the digital inputs
is shown in Figure 2.
The inputs will float to logic “0” if left unconnected. It is
recommended that any unused inputs be connected to DCOM
to improve noise immunity.
Digital inputs remain high impedance when power is off.
INPUT CODING
The DAC714 is designed to accept binary two’s comple-
ment (BTC) input codes with the MSB first which are
compatible with bipolar analog output operation. For this
configuration, a digital input of 7FFFH produces a plus full
scale output, 8000H produces a minus full scale output, and
0000H produces bipolar zero output.
INTERNAL REFERENCE
The DAC714 contains a +10V reference. The reference
output may be used to drive external loads, sourcing up to
2mA. The load current should be constant, otherwise the
gain and bipolar offset of the converter will vary.
®
DAC714
6

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DAC714P pdf, datenblatt
Data
Data Latch
Update
CLK
4
SDI
2
A0
3
A1
1
CLK
+5V 16
CLR
DAC714
5
SDO
4
SDI
2
A0
3
A1
1
CLK
+5V 16
CLR
DAC714
5
SDO
4
SDI
2
A0
3
A1
1
CLK
+5V 16
CLR
DAC714
5
SDO
To other DACs
FIGURE 8a. Cascaded Serial Bus Connection with Synchronous Update.
DAC3
DAC2
DAC1
Clock(1)
Data
F ED C BA 9 8 7 6 5 4 3 2 1 0 F E D C B A9 8 7 6 5 4 3 2 1 0 F ED CB A 9 8 7 6 5 4 3 2 1 0
Data Latch
Update
NOTE: (1) Maximum Clock Frequency is 5.26MHz.
FIGURE 8b. Timing Diagram For Figure 8a.
®
DAC714
12

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