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DALC208SC6 Schematic ( PDF Datasheet ) - STMicroelectronics

Teilenummer DALC208SC6
Beschreibung LOW CAPACITANCE DIODE ARRAY
Hersteller STMicroelectronics
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Gesamt 10 Seiten
DALC208SC6 Datasheet, Funktion
®
Application Specific Discretes
A.S.D.TM
DALC208SC6
LOW CAPACITANCE
DIODE ARRAY
MAIN APPLICATIONS
Where ESD and/or over and undershoot protection
for datalines is required :
Sensitive logic input protection
Microprocessor based equipment
Audio / Video inputs
Portable electronics
Networks
ISDN equipment
USB interface
DESCRIPTION
The DALC208SC6 diode array is designed to
protect components which are connected to data
and transmission lines from overvoltages caused
by electrostatic discharge (ESD) or other
transients. It is a rail-to-rail protection device also
suited for overshoot and undershoot suppression
on sensitive logic inputs.
The low capacitance of the DALC208SC6
prevents from significant signal distortion.
1
SOT23-6L (SC74)
FUNCTIONAL DIAGRAM
FEATURES
PROTECTION OF 4 LINES
PEAK REVERSE VOLTAGE:
VRRM = 9 V per diode
VERY LOW CAPACITANCE PER DIODE:
C < 5 pF
VERY LOW LEAKAGE CURRENT: IR < 1 µA
I/O 1
REF 2
I/O 2
I/O 4
REF 1
I/O 3
BENEFITS
Cost-effectiveness compared to discrete solution
High efficiency in ESD suppression
No significant signal distortion thanks to very low
capacitance
High reliability offered by monolithic integration
Lower PCB area consumption versus discrete
solution
COMPLIES WITH THE FOLLOWING STANDARDS :
IEC 1000-4-2
level 4
MIL STD 883C - Method 3015-6
(human body test)
class 3
February 1999 - Ed: 3A
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DALC208SC6 Datasheet, Funktion
DALC208SC6
CROSSTALK BEHAVIOR
1- Crosstalk phenomena
Fig. A4: Crosstalk phenomena.
RG1
VG1
RG2
VG2
Line 1
Line 2
RL1 α1VG1 + β12VG2
RL2 α 2VG2 + β21VG1
DRIVERS
The crosstalk phenomena are due to the coupling
between 2 lines. The coupling factor (β12 or β21)
increases when the gap across lines decreases,
particularly in silicon dice. In the example above
the expected signal on load RL2 is α2VG2, in fact
the real voltage at this point has got an extra value
β21VG1. This part of the VG1 signal represents the
effect of the crosstalk phenomenon of the line 1 on
the line 2. This phenomenon has to be taken into
account when the drivers impose fast digital data
or high frequency analog signals in the disturbing
line. The perturbed line will be more affected if it
works with low voltage signal or high load
impedance (few k). The following chapters give
the value of both digital and analog crosstalk.
2- Digital Crosstalk
Fig. A5: Digital crosstalk measurements.
RECEIVERS
Fig. A6: Digital crosstalk results.
+5V +5V +5V
74HC04
100nF
74HC04
Line 1
Square
Pulse
Generator
5KHz
+5V
VG1
Line 2
β21 VG1
DALC208SC6
Figure A5 shows the measurement circuit used to
quantify the crosstalk effect in a classical digital
application.
Figure A6 shows that in such a condition: signal
from 0V to 5V and a rise time of 5 ns, the impact on
the disturbed line is less than 100mV peak to peak.
No data disturbance was noted on the concerned
line. The same results were obtained with falling
edges.
Note: The measurements have been done in the worst case i.e. on
two adjacent cells (I/O1 & I/O4).
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