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PDF DAC8501E250 Data sheet ( Hoja de datos )
| Número de pieza | DAC8501E250 | |
| Descripción | Low-Power/ Rail-to-Rail Output/ 16-Bit Serial Input DIGITAL-TO-ANALOG CONVERTER | |
| Fabricantes | Burr-Brown Corporation | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de DAC8501E250 (archivo pdf) en la parte inferior de esta página. Total 18 Páginas | ||
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DAC8501
SBAS212A – APRIL 2001 – REVISED FEBRUARY 2003
Low-Power, Rail-to-Rail Output, 16-Bit Serial Input
DIGITAL-TO-ANALOG CONVERTER
FEATURES
q microPOWER OPERATION: 250µA at 5V
q MULTIPLYING-MODE BANDWIDTH: 350kHz
q POWER-ON RESET TO ZERO
q POWER SUPPLY: +2.7V to +5.5V
q ENSURED MONOTONIC BY DESIGN
q SETTLING TIME: 10µs to ±0.003% FSR
q LOW-POWER SERIAL INTERFACE WITH
SCHMITT-TRIGGERED INPUTS
q ON-CHIP OUTPUT BUFFER AMPLIFIER,
RAIL-TO-RAIL OPERATION
q SYNC INTERRUPT FACILITY
q MSOP-8 PACKAGE
APPLICATIONS
q PROCESS CONTROL
q DATA ACQUISITION SYSTEMS
q CLOSED-LOOP SERVO-CONTROL
q PC PERIPHERALS
q PORTABLE INSTRUMENTATION
q PROGRAMMABLE ATTENUATION
VDD
VREF
Ref (+)
16-Bit DAC
DESCRIPTION
The DAC8501 is a low-power, single, 16-bit buffered voltage
output Digital-to-Analog Converter (DAC) optimized for multi-
plying operation. Its on-chip precision output amplifier allows
rail-to-rail output swing to be achieved. The DAC8501 uses a
versatile 3-wire serial interface that operates at clock rates up
to 30MHz and is compatible with standard SPI™, QSPI™,
Microwire™, and Digital Signal Processor (DSP) interfaces.
The DAC8501 requires an external reference voltage to set
the output range of the DAC. The DAC8501 incorporates a
power-on reset circuit that ensures that the DAC output
powers up at 0V and remains there until a valid write takes
place to the device. The DAC8501 contains a power-down
feature, accessed over the serial interface, that reduces the
current consumption of the device to 200nA at 5V.
The low-power consumption of this part in normal operation
makes it ideally suited to portable battery-operated equip-
ment. The power consumption is 1.2mW at 5V reducing to
1µW in power-down mode.
The DAC8501 is available in an MSOP-8 package.
SPI and QSPI are registered trademarks of Motorola.
Microwire is a registered trademark of National Semiconductor.
VFB
VOUT
16
DAC Register
SYNC
SCLK
DIN
16
Shift Register
Power-Down
Control Logic
Resistor
Network
GND
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright © 2001-2003, Texas Instruments Incorporated
1 page  
TYPICAL CHARACTERISTICS: VDD = +5V
At TA = +25°C, and +VDD = +5V, unless otherwise noted.
LINEARITY ERROR AND
DIFFERENTIAL LINEARITY ERROR vs CODE
(–40°C)
64
48
32
16
0
–16
–32
–48
–64
2.0
1.5
1.0
0.5
0.0
–0.5
–1.0
–1.5
–2.0
0000H
2000H
4000H 6000H
8000H
A000H C000H
E000H FFFFH
Digital Input Code
LINEARITY ERROR AND
DIFFERENTIAL LINEARITY ERROR vs CODE
(+25°C)
64
48
32
16
0
–16
–32
–48
–64
2.0
1.5
1.0
0.5
0.0
–0.5
–1.0
–1.5
–2.0
0000H
2000H
4000H 6000H
8000H
A000H C000H
E000H FFFFH
Digital Input Code
LINEARITY ERROR AND
DIFFERENTIAL LINEARITY ERROR vs CODE
(+105°C)
64
48
32
16
0
–16
–32
–48
–64
2.0
1.5
1.0
0.5
0.0
–0.5
–1.0
–1.5
–2.0
0000H
2000H
4000H 6000H
8000H
A000H C000H
E000H FFFFH
Digital Input Code
20
15
10
5
0
–5
–10
–15
–20
–40
ZERO-SCALE ERROR vs TEMPERATURE
0 40
Temperature (°C)
80
120
20
15
10
5
0
–5
–10
–15
–20
–40
FULL-SCALE ERROR vs TEMPERATURE
0 40 80
Temperature (°C)
120
2000
IDD HISTOGRAM
1500
1000
500
0
100 130 160 190 220 250 280 310 340 370 400
IDD (µA)
DAC8501
SBAS212A
www.ti.com
5
5 Page 
TYPICAL CHARACTERISTICS: VDD = +2.7V (Cont.)
At TA = +25°C, and +VDD = +2.7V, unless otherwise noted.
CODE CHANGE GLITCH
Glitch Waveform (20mV/div)
Time (2µs/div)
THEORY OF OPERATION
DAC SECTION
The architecture consists of a string DAC followed by an
output buffer amplifier. Figure 1 shows a block diagram of the
DAC architecture.
RESISTOR STRING
The resistor string section is shown in Figure 2, it is simply a
string of resistors, each of value R. The code loaded into the
DAC register determines at which node on the string the voltage
is tapped off to be fed into the output amplifier by closing one
of the switches connecting the string to the amplifier. It is
ensured monotonic because it is a string of resistors.
DAC Register
VDD
REF (+)
Resistor String
REF(–)
GND
VFB
Output
Amplifier
VOUT
FIGURE 1. DAC8501 Architecture.
The input coding to the DAC8501 is straight binary, so the
ideal output voltage is given by:
VOUT
=
VREF
•
D
65536
(1)
where D = decimal equivalent of the binary code that is
loaded to the DAC register; it can range from 0 to 65535.
R
R
R
R
To Output
Amplifier
R
DAC8501
SBAS212A
FIGURE 2. Resistor String.
www.ti.com
11
11 Page | ||
| Páginas | Total 18 Páginas | |
| PDF Descargar | [ Datasheet DAC8501E250.PDF ] | |
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