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DAC8222FS Schematic ( PDF Datasheet ) - Analog Devices

Teilenummer DAC8222FS
Beschreibung Dual 12-Bit Double-Buffered Multiplying CMOS D/A Converter
Hersteller Analog Devices
Logo Analog Devices Logo 




Gesamt 15 Seiten
DAC8222FS Datasheet, Funktion
a
Dual 12-Bit Double-Buffered
Multiplying CMOS D/A Converter
DAC8222
FEATURES
Two Matched 12-Bit DACs on One Chip
Direct Parallel Load of All 12 Bits for High Data
Throughput
Double-Buffered Digital Inputs
12-Bit Endpoint Linearity (؎1/2 LSB) Over Temperature
+5 V to +15 V Single Supply Operation
DACs Matched to 1% Max
Four-Quadrant Multiplication
Improved ESD Resistance
Packaged in a Narrow 0.3" 24-Lead DIP and 0.3"
24- Lead SOL Package
Available in Die Form
APPLICATIONS
Automatic Test Equipment
Robotics/Process Control/Automation
Digital Gain/Attenuation Control
Ideal for Battery-Operated Equipment
FUNCTIONAL DIAGRAM
GENERAL DESCRIPTION
The DAC8222 is a dual 12-bit, double-buffered, CMOS digital-
to-analog converter. It has a 12-bit wide data port that allows a
12-bit word to be loaded directly. This achieves faster through-
put time in stand-alone systems or when interfacing to a 16-bit
processor. A common 12-bit input TTL/CMOS compatible
data port is used to load the 12-bit word into either of the two
DACs. This port, whose data loading is similar to that of a RAM’s
write cycle, interfaces directly with most 12-bit and 16-bit bus
systems. (See DAC8248 for a complete 8-bit data bus interface
product.) A common bus allows the DAC8222 to be packaged
in a narrow 24-lead 0.3" DIP and save PCB space.
The DAC is controlled with two signals, WR and LDAC. With
logic low at these inputs, the DAC registers become transparent.
This allows direct unbuffered data to flow directly to either
DAC output selected by DAC A/DAC B. Also, the DAC’s
double-buffered digital inputs will allow both DACs to be
simultaneously updated.
DAC8222’s monolithic construction offers excellent DAC-to-
DAC matching and tracking over the full operating tempera-
ture range. The chip consists of two thin-film R-2R resistor
ladder networks, four 12-bit registers, and DAC control logic
circuitry. The device has separate reference-input and feedback
resistors for each DAC and operates on a single supply from
+5 V to +15 V. Maximum power dissipation at +5 V using
zero or VDD logic levels is less than 0.5 mW.
The DAC8222 is manufactured with highly stable thin-film re-
sistors on an advanced oxide-isolated, silicon-gate, CMOS
technology. Improved latch-up resistant design eliminates the
need for external protective Schottky diodes.
REV. C
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2000






DAC8222FS Datasheet, Funktion
DAC8222
TYPICAL PERFORMANCE CHARACTERISTICS
Figure 10. Full-Scale Gain Error vs.
Temperature
Figure 11. Logic Input Threshold
Voltage vs. Supply Voltage (VDD)
Figure 12. Supply Current vs.
Temperature
Figure 13. Supply Current vs. Logic
Input Voltage
Figure 14. Multiplying Mode Frequency
Response vs. Digital Code
Figure 15. Output Leakage Current
vs. Temperature
Figure 16. Analog Crosstalk vs.
Frequency
Figure 17. Interface Timing vs. VDD
–6– REV. C

6 Page









DAC8222FS pdf, datenblatt
DAC8222
Figure 26. Single Supply Operation (Current Switching Mode)
SINGLE SUPPLY OPERATION
CURRENT STEERING MODE
Because the DAC8222’s R-2R resistor ladder terminating resis-
tor is internally connected to AGND, it lends itself well to single
supply operation in the current steering mode. This means that
AGND can be raised above system ground as shown in Figure 26.
The output voltage range will be from +5 V to +10 V depending
on the digital input code and is given by:
VOUT = VOS + (n/4096) (VOS)
where VOS = Offset Reference Voltage (+5 V in Figure 26)
where n = Decimal Equivalent of the Digital Input Word
VOLTAGE SWITCHING MODE
Figure 27 shows the DAC8222 in a single supply voltage
switching mode of operation. In this configuration, the DAC’s
R-2R ladder acts as a voltage divider. The output voltage at the
VREF pin exhibits a constant impedance R (typically 11 k) and
must be buffered by an op amp. RFB pins are not used in this
circuit configuration. The reference input voltage must be main-
tained within +1.25 V of AGND and VDD from +12 V to +15 V
to preserve device accuracy.
The output voltage expression is given by:
VOUT = VREF (n/4096)
where n = Decimal Equivalent of the Digital Input Word
APPLICATIONS TIPS
GENERAL GROUND MANAGEMENT
Grounding techniques should be tailored to each individual sys-
tem. Ground loops should be avoided, and ground current
paths should be as short as possible and have a low impedance.
The DAC8222’s AGND and DGND pins should be tied to-
gether at the device socket to prevent digital transients from ap-
pearing at the analog output. This common point then becomes
the single ground point connection. AGND and DGND should
then be brought out separately and tied to their respective power
supply grounds. Ground loops can be created if both grounds
are tied together at more than one location, i.e., tied together at
the device and at the digital and analog power supplies.
A PC board ground plane can be used for the single point
ground connection should the connections not be practical at
the device socket. If neither of these connections is practical or
allowed, the device should be placed as close as possible to the
system’s single point ground connection. Back-to-back Schottky
diodes should then be connected between AGND and DGND.
POWER SUPPLY DECOUPLING
Power supplies used with the DAC8222 should be well filtered
and regulated. Local supply decoupling consisting of a 1 µF to
10 µF tantalum capacitor in parallel with a 0.1 µF ceramic is
highly recommended. The capacitors should be connected be-
tween the VDD and DGND pins and at the device socket.
–12–
REV. C

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