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DAC811RH Schematic ( PDF Datasheet ) - Burr-Brown Corporation

Teilenummer DAC811RH
Beschreibung Microprocessor-Compatible 12-BIT DIGITAL-TO-ANALOG CONVERTER
Hersteller Burr-Brown Corporation
Logo Burr-Brown Corporation Logo 




Gesamt 9 Seiten
DAC811RH Datasheet, Funktion
® DAC811
For most current data sheet and other product
information, visit www.burr-brown.com
Microprocessor-Compatible
12-BIT DIGITAL-TO-ANALOG CONVERTER
FEATURES
q SINGLE INTEGRATED CIRCUIT CHIP
q MICROCOMPUTER INTERFACE:
DOUBLE-BUFFERED LATCH
q VOLTAGE OUTPUT: ±10V, ±5V, +10V
q MONOTONICITY GUARANTEED OVER
TEMPERATURE
q ±1/2LSB MAXIMUM NONLINEARITY OVER
TEMPERATURE
q GUARANTEED SPECIFICATIONS AT ±12V
AND ±15V SUPPLIES
q TTL/5V CMOS-COMPATIBLE LOGIC
INPUTS
DESCRIPTION
The DAC811 is a complete, single-chip integrated-
circuit, microprocessor-compatible, 12-bit digital-to-
analog converter. The chip combines a precision volt-
age reference, microcomputer interface logic, and
double-buffered latch, in a 12-bit D/A converter with
a voltage output amplifier. Fast current switches and a
laser-trimmed thin-film resistor network provide a
highly accurate and fast D/A converter.
Microcomputer interfacing is facilitated by a double-
buffered latch. The input latch is divided into three
4-bit nibbles to permit interfacing to 4-, 8-, 12-, or
16-bit buses and to handle right-or left-justified data.
The 12-bit data in the input latches is transferred to the
D/A latch to hold the output value.
Input gating logic is designed so that loading the last
nibble or byte of data can be accomplished simulta-
neously with the transfer of data (previously stored in
adjacent latches) from adjacent input latches to the
D/A latch. This feature avoids spurious analog output
values while using an interface technique that saves
computer instructions.
The DAC811 is laser trimmed at the wafer level and
is specified to ±1/4LSB maximum linearity error (B,
K, and S grades) at 25°C and ±1/2LSB maximum over
the temperature range. All grades are guaranteed mono-
tonic over the specification temperature range.
The DAC811 is available in six performance grades
and three package types. DAC811J and K are speci-
fied over the temperature ranges of 0°C to +70°C;
DAC811A and B are specified over –25°C to +85°C;
DAC811R and S are specified over –55°C to +125°C.
DAC811J and K are packaged in a reliable 28-pin
plastic DIP or plastic SOIC package, while DAC811A,
B, R and S are available in a 28-pin 0.6" wide dual-
inline hermetically sealed ceramic side-brazed pack-
age (H package).
4 MSBs
4 LSBs
Input Latch Input Latch Input Latch
D/A Latch
12-Bit D/A Converter
Voltage Reference
RBPO
BPO
SJ
RF 10V
RF
VOUT
International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111
Twx: 910-952-1111 • Internet: http://www.burr-brown.com/ • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132
© 1983 Burr-Brown Corporation
PDS1-503K
DAC811Printed in U.S.A. January, 2000
®






DAC811RH Datasheet, Funktion
+ Full Scale
1LSB
Range of
Offset Adj.
All Bits
Logic 0
Range of
Gain Adjust
Gain Adjust
Rotates the Line
All Bits
Logic 1
Digital Input
Offset Adjust Translates the Line
FIGURE 3. Relationship of Offset and Gain Adjustments
for a Unipolar D/A Converter.
±12V OPERATION
The DAC811 is fully specified for operation on ±12V power
supplies. However, in order for the output to swing to ±10V,
the power supplies must be ±13.5V or greater. When oper-
ating with ±12VB supplies, the output swing should be
restricted to ±8V in order to meet specifications.
LOGIC INPUT COMPATIBILITY
The DAC811 digital inputs are TTL, LSTTL, and 54/74HC
CMOS-compatible over the operating range of VDD. The
input switching threshold remains at the TLL threshold over
the supply range.
The logic input current over temperature is low enough to
permit driving the DAC811 directly from the outputs of
4000B and 54/74C CMOS devices.
Resistors of 47should be placed in series with D0 through
D11, WR, NA, NB, NC and LDAC if edges are <10ns or if
the logic input is driven below ground by undershoot.
+ Full Scale
1LSB
All Bits
Logic 0
Full Scale
Range
Range of
Gain Adjust
Gain Adjust
Rotates the Line
INSTALLATION
POWER SUPPLY CONNECTIONS
For optimum performance and noise rejection, power supply
decoupling capacitors should be added as shown in Figure 5.
These capacitors (1µF tantalum recommended) should be
located close to the DAC811.
Bipolar V
Offset
Range of
Offset Adjust
Offset Adj.
Translates
the Line
±0.4%
MSB on All
Others Off
– Full Scale
Digital Input
All Bits
Logic 1
FIGURE 4. Relationship of Offset and Gain Adjustments
for a Bipolar D/A Converter.
DIGITAL INPUT
MSB
LSB
↓↓
111111111111
100000000000
011111111111
000000000000
LSB
ANALOG OUTPUT
0 to +10V
±5V
±10V
+9.9976V
+5V
+4.9976V
0V
2.4mV
+4.9976V
0V
–0.0024V
–5V
2.44mV
+9.9951V
0V
–0.0049V
–10V
4.88mV
TABLE III. Digital Input/Analog Output.
GAIN ADJUSTMENT
For either unipolar or bipolar configurations, apply the
digital input that should give the maximum positive voltage
output. Adjust the gain potentiometer for this positive full
scale voltage. See Table III for positive full scale voltages.
VDD
1µF
1 VDD
28
2 BPO 27
Summing
3 Junction 26
4 25
5 VOUT 24
6 ACOM 23
7 Gain Adjust 22
8 –VCC 21
9 +VCC 20
10 19
11 18
12 17
13 16
14 DCOM 15
Connect for
Bipolar Operation
1M
–VCC
10kto
100k
3.9M
+VCC
10kto
100k
–VCC
+VCC
0.0022µF
1µF
1µF
FIGURE 5. Power Supply, Gain, and Offset Potentiometer
Connections.
®
DAC811
6

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