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PDF ADG801 Data sheet ( Hoja de datos )

Número de pieza ADG801
Descripción <0.5 ohm CMOS/ Low Voltage/ SPST Switches
Fabricantes Analog Devices 
Logotipo Analog Devices Logotipo



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PRELIMINARY TECHNICAL DATA
a
FEATURES
Low On Resistance < 0.5 max at 5 V supply
0.1 On Resistance Flatness
+1.8 V to +5.5 V Single Supply
100pA Leakage Currents
14ns Switching Times
Extended Temperature Range -40oC to +125oC
High Current Carrying Capability
Tiny 6 lead SOT23 and 8 Lead µSOIC Packages
Low Power Consumption
TTL/CMOS Compatible Inputs
Pin Compatible with ADG701/ADG702
APPLICATIONS
Power Routing
Audio and Video Signal Routing
Cellular Phones
Modems
PCMCIA Cards
Hard Drives
Data Acquisition Systems
Communication Systems
Relay replacement
Audio and Video Switching
Battery Powered Systems
<0.5
CMOS, Low Voltage, SPST Switches
ADG801/ADG802
FUNCTIONAL BLOCK DIAGRAMS
ADG801
S
DS
ADG802
D
IN IN
SWITCHES SHOWN FOR A LOGIC "1" INPUT
GENERAL DESCRIPTION
The ADG801/ADG802 are monolithic CMOS SPST (Single
Pole, Single Throw) switches with On Resistance of less than
0.5. These switches are designed on an advanced submicron
process that provides extremely low on resistance, high switch-
ing speed and low leakage currents.
The low On Resistance of <0.5means these parts are ideal
for applications where low on resistance switching is critical.
The ADG801 is a normally open (NO) switch, while the
ADG802 is normally closed (NC). Each switch conducts
equally well in both directions when ON.
The ADG801 and ADG802 are available in 6-lead SOT-23
and 8 Lead µSOIC packages.
PRODUCT HIGHLIGHTS
1. Low On Resistance (0.25 typical).
2. +1.8V to +5.5V Single Supply Operation.
3. Tiny 6 Lead SOT23 and 8 Lead µSOIC Packages.
4. Pin Compatible with ADG701 (ADG801)
Pin Compatible with ADG702 (ADG802).
REV. PrE Jan ‘02
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O.Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2002

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ADG801 pdf
PRELIMINARY TECHNICAL DATA
ADG801/ADG802
TERMINOLOGY
VDD
IDD
GND
Most positive power supply potential.
Positive supply current.
Ground (0 V) reference.
S Source terminal. May be an input or output.
D Drain terminal. May be an input or output.
IN Logic control input.
VD (VS)
RON
RFLAT(ON)
Analog voltage on terminals D, S
Ohmic resistance between D and S.
Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured
over the specified analog signal range.
IS (OFF)
ID (OFF)
ID, IS (ON)
VINL
VINH
IINL(IINH)
CS (OFF)
CD (OFF)
CD,CS(ON)
CIN
tON
tOFF
Source leakage current with the switch OFF.
Drain leakage current with the switch OFF.
Channel leakage current with the switch ON.
Maximum input voltage for logic 0.
Minimum input voltage for logic 1.
Input current of the digital input.
OFFswitch source capacitance. Measured with reference to ground.
OFFswitch drain capacitance. Measured with reference to ground.
ONswitch capacitance. Measured with reference to ground.
Digital input capacitance.
Delay between applying the digital control input and the output switching on. See Test Circuit 4.
Delay between applying the digital control input and the output switching off.
Charge
Injection
A measure of the glitch impulse transferred from the digital input to the analog output during switching.
Off Isolation A measure of unwanted signal coupling through an OFFswitch.
Crosstalk
A measure of unwanted signal which is coupled through from one channel to another as a result of parasitic
capacitance.
Bandwidth The frequency at which the output is attenuated by 3dBs.
On Response The Frequency response of the ONswitch.
Insertion
Loss
The loss due to the ON resistance of the switch.
REV. PrE
–5–

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