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ADG758 Schematic ( PDF Datasheet ) - Analog Devices

Teilenummer ADG758
Beschreibung 3 ohm/ 4-/8-Channel Multiplexers in Chip Scale Package
Hersteller Analog Devices
Logo Analog Devices Logo 




Gesamt 12 Seiten
ADG758 Datasheet, Funktion
a
FEATURES
1.8 V to 5.5 V Single Supply
؎2.5 V Dual Supply
3 ON Resistance
0.75 ON Resistance Flatness
100 pA Leakage Currents
14 ns Switching Times
Single 8-to-1 Multiplexer ADG758
Differential 4-to-1 Multiplexer ADG759
20-Lead 4 mm ؋ 4 mm Chip Scale Package
Low Power Consumption
TTL-/CMOS-Compatible Inputs
For Functionally Equivalent Devices in 16-Lead TSSOP
Package, See ADG708/ADG709
APPLICATIONS
Data Acquisition Systems
Communication Systems
Relay Replacement
Audio and Video Switching
Battery-Powered Systems
3 , 4-/8-Channel Multiplexers
in Chip Scale Package
ADG758/ADG759
FUNCTIONAL BLOCK DIAGRAMS
ADG758
ADG759
S1 S1A
DA
S4A
D
S1B
DB
S8 S4B
1 OF 8
DECODER
1 OF 4
DECODER
A0 A1 A2 EN
A0 A1 EN
GENERAL DESCRIPTION
The ADG758 and ADG759 are low voltage, CMOS analog
multiplexers comprising eight single channels and four differential
channels, respectively. The ADG758 switches one of eight inputs
(S1–S8) to a common output, D, as determined by the 3-bit
binary address lines A0, A1, and A2. The ADG759 switches one
of four differential inputs to a common differential output as
determined by the 2-bit binary address lines A0 and A1. An EN
input on both devices is used to enable or disable the device. When
disabled, all channels are switched OFF.
Low power consumption and an operating supply range of 1.8 V to
5.5 V make the ADG758 and ADG759 ideal for battery-powered,
portable instruments. All channels exhibit break-before-make
switching action preventing momentary shorting when switch-
ing channels.
These switches are designed on an enhanced submicron process
that provides low power dissipation yet gives high switching
speed, very low ON resistance and leakage currents. ON resistance
is in the region of a few ohms and is closely matched between
switches and very flat over the full signal range. These parts can
operate equally well as either multiplexers or demultiplexers
and have an input signal range that extends to the supplies.
The ADG758 and ADG759 are available in 20-lead chip
scale packages.
PRODUCT HIGHLIGHTS
1. Small 20-Lead 4 mm × 4 mm Chip Scale Packages (CSP).
2. Single/Dual Supply Operation. The ADG758 and ADG759
are fully specified and guaranteed with 3 V and 5 V single-
supply and ± 2.5 V dual-supply rails.
3. Low RON (3 Typical).
4. Low Power Consumption (<0.01 µW).
5. Guaranteed Break-Before-Make Switching Action.
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2002






ADG758 Datasheet, Funktion
ADG758/ADG759
TERMINOLOGY
VDD
VSS
GND
S
D
IN
RON
RFLAT(ON)
IS (OFF)
ID (OFF)
ID, IS (ON)
VD (VS)
CS (OFF)
CD (OFF)
CD, CS (ON)
CIN
tTRANSITION
tON (EN)
tOFF (EN)
tOPEN
Off Isolation
Crosstalk
Charge
Injection
On Response
On Loss
VINL
VINH
IINL (IINH)
IDD
ISS
Most Positive Power Supply Potential
Most Negative Power Supply in a dual-supply application. In single-supply applications, this should be tied to
ground at the device.
Ground (0 V) Reference
Source Terminal. May be an input or output.
Drain Terminal. May be an input or output.
Logic Control Input
Ohmic Resistance between D and S
Flatness is defined as the difference between the maximum and minimum value of ON resistance as measured over
the specified analog signal range.
Source Leakage Current with the Switch OFF
Drain leakage Current with the Switch OFF
Channel Leakage current with the Switch ON
Analog Voltage on Terminals D, S
OFF Switch Source Capacitance. Measured with reference to ground.
OFF Switch Drain Capacitance. Measured with reference to ground.
ON Switch Capacitance. Measured with reference to ground.
Digital Input Capacitance
Delay Time measured between the 50% and 90% points of the digital inputs and the switch ON condition when
switching from one address state to another.
Delay Time between the 50% and 90% points of the EN digital input and the switch ON condition.
Delay Time between the 50% and 90% points of the EN digital input and the switch OFF condition.
OFF Time measured between the 80% points of both switches when switching from one address state to another.
A measure of unwanted signal coupling through an OFF switch.
A measure of unwanted signal which is coupled through from one channel to another as a result of parasitic capacitance.
A measure of the glitch impulse transferred from the digital input to the analog output during switching.
The Frequency Response of the ON Switch.
The Loss Due to the ON Resistance of the Switch
Maximum Input Voltage for Logic “0”
Minimum Input Voltage for Logic “1”
Input Current of the Digital Input
Positive Supply Current
Negative Supply Current
–6– REV. A

6 Page









ADG758 pdf, datenblatt
ADG758/ADG759
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
20-Lead Chip Scale Package
(CP-20)
0.024 (0.60)
0.157 (4.0)
BSC SQ
0.017 (0.42)
0.009 (0.24)
0.024 (0.60)
0.010 (0.25)
MIN
0.017 (0.42)
PIN 1
INDICATOR
TOP
VIEW
0.148 (3.75)
BSC SQ
0.009 (0.24)
0.012 (0.30)
0.009 (0.23)
0.007 (0.18)
16 20
15 1
BOTTOM
VIEW
0.089 (2.25)
0.083 (2.10) SQ
0.077 (1.95)
0.030 (0.75)
0.024 (0.60)
11
10
5
6
12؇ MAX
0.028 (0.70) MAX 0.020 (0.50)
0.026 (0.65) NOM
0.080 (2.00)
REF
0.035 (0.90) MAX
0.033 (0.85) NOM
0.002 (0.05)
0.0004 (0.01)
SEATING 0.020 (0.50)
PLANE
BSC
0.0 (0.0)
0.008 (0.20)
REF
Revision History
Location
Page
Data Sheet changed from REV. 0 to REV. A.
Edits to General Description section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Update Outline Drawings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
–12–
REV. A

12 Page





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