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ADE7755 Schematic ( PDF Datasheet ) - Analog Devices

Teilenummer ADE7755
Beschreibung Energy Metering IC
Hersteller Analog Devices
Logo Analog Devices Logo 




Gesamt 20 Seiten
ADE7755 Datasheet, Funktion
Energy Metering IC with Pulse Output
ADE7755
FEATURES
High accuracy, surpasses 50 Hz/60 Hz IEC 687/IEC 1036
Less than 0.1% error over a dynamic range of 500 to 1
Supplies active power on the frequency outputs, F1 and F2
High frequency output CF is intended for calibration and
supplies instantaneous active power
Synchronous CF and F1/F2 outputs
Logic output REVP provides information regarding the sign
of the active power
Direct drive for electromechanical counters and 2-phase
stepper motors (F1 and F2)
Programmable gain amplifier (PGA) in the current channel
facilitates usage of small shunts and burden resistors
Proprietary ADCs and DSPs provide high accuracy over large
variations in environmental conditions and time
On-chip power supply monitoring
On-chip creep protection (no load threshold)
On-chip reference 2.5 V ± 8% (30 ppm/°C typical) with
external overdrive capability
Single 5 V supply, low power (15 mW typical)
Low cost CMOS process
GENERAL DESCRIPTION
The ADE7755 is a high accuracy electrical energy measurement
IC. The part specifications surpass the accuracy requirements as
quoted in the IEC 1036 standard.
The only analog circuitry used in the ADE7755 is in the ADCs
and reference circuit. All other signal processing (for example,
multiplication and filtering) is carried out in the digital domain.
This approach provides superior stability and accuracy over
extremes in environmental conditions and over time.
The ADE7755 supplies average active power information on the
low frequency outputs, F1 and F2. These logic outputs can be
used to directly drive an electromechanical counter or interface to
an MCU. The CF logic output gives instantaneous active power
information. This output is intended to be used for calibration
purposes or for interfacing to an MCU.
The ADE7755 includes a power supply monitoring circuit on the
AVDD supply pin. The ADE7755 remains in a reset condition until
the supply voltage on AVDD reaches 4 V. If the supply falls below
4 V, the ADE7755 resets and no pulse is issued on F1, F2, and CF.
Internal phase matching circuitry ensures that the voltage and
current channels are phase matched whether the HPF in Channel 1
is on or off. An internal no load threshold ensures that the
ADE7755 does not exhibit any creep when there is no load.
The ADE7755 is available in a 24-lead SSOP package.
V1P 5
V1N 6
V2P 8
V2N 7
FUNCTIONAL BLOCK DIAGRAM
G0 G1
16 15
AVDD
3
AGND
11
AC/DC
ADE7755
2
DVDD
1
DGND
21
POWER
SUPPLY MONITOR
PHASE
CORRECTION
...110101...
ADC
PGA
×1, ×2, ×8, ×16
HPF
MULTIPLIER
SIGNAL
PROCESSING
BLOCK
LPF
...11011001...
ADC
2.5V
4k
REFERENCE
DIGITAL-TO-FREQUENCY
CONVERTER
9 RESET
10 17 18 12 14 13 20 22 24 23
REFIN/OUT CLKIN CLKOUT SCF S0 S1 REVP CF F1 F2
Figure 1.
1U.S. Patents 5,745,323; 5,760,617; 5,862,069; and 5,872,469.
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2002–2009 Analog Devices, Inc. All rights reserved.






ADE7755 Datasheet, Funktion
ADE7755
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
DVDD 1
AC/DC 2
AVDD 3
NC 4
V1P 5
V1N 6
V2N 7
V2P 8
RESET 9
REFIN/OUT 10
AGND 11
SCF 12
ADE7755
TOP VIEW
(Not to Scale)
24 F1
23 F2
22 CF
21 DGND
20 REVP
19 NC
18 CLKOUT
17 CLKIN
16 G0
15 G1
14 S0
13 S1
NC = NO CONNECT
Figure 3. Pin Configuration
Table 4. Pin Function Descriptions
Pin No. Mnemonic Description
1 DVDD Digital Power Supply. This pin provides the supply voltage for the digital circuitry in the ADE7755. The supply
voltage should be maintained at 5 V ± 5% for specified operation. This pin should be decoupled with a 10 μF
capacitor in parallel with a ceramic 100 nF capacitor.
2
AC/DC
High-Pass Filter Select. This logic input is used to enable the HPF in Channel 1 (current channel). A Logic 1 on
this pin enables the HPF. The associated phase response of this filter is internally compensated over a
frequency range of 45 Hz to 1 kHz. The HPF should be enabled in power metering applications.
3 AVDD Analog Power Supply. This pin provides the supply voltage for the analog circuitry in the ADE7755. The supply
should be maintained at 5 V ± 5% for specified operation. Every effort should be made to minimize power
supply ripple and noise at this pin by the use of proper decoupling. This pin should be decoupled to AGND
with a 10 μF capacitor in parallel with a ceramic 100 nF capacitor.
4, 19 NC
No Connect.
5, 6
V1P, V1N
Analog Inputs for Channel 1 (Current Channel). These inputs are fully differential voltage inputs with a
maximum differential signal level of ±470 mV for specified operation. Channel 1 also has a PGA, and the gain
selections are outlined in Table 5. The maximum signal level at these pins is ±1 V with respect to AGND. Both
inputs have internal ESD protection circuitry. An overvoltage of ±6 V can be sustained on these inputs without
risk of permanent damage.
7, 8
V2N, V2P
Negative and Positive Inputs for Channel 2 (Voltage Channel). These inputs provide a fully differential input pair
with a maximum differential input voltage of ±660 mV for specified operation. The maximum signal level at
these pins is ±1 V with respect to AGND. Both inputs have internal ESD protection circuitry, and an overvoltage
of ±6 V can be sustained on these inputs without risk of permanent damage.
9
RESET
Reset Pin. A logic low on this pin holds the ADCs and digital circuitry in a reset condition.
Bringing this pin logic low clears the ADE7755 internal registers.
10
REFIN/OUT
This pin provides access to the on-chip voltage reference. The on-chip reference has a nominal value of
2.5 V ± 8% and a typical temperature coefficient of 30 ppm/°C. An external reference source may also be
connected at this pin. In either case, this pin should be decoupled to AGND with a 1 μF ceramic capacitor and
a 100 nF ceramic capacitor.
11
AGND
This pin provides the ground reference for the analog circuitry in the ADE7755, that is, the ADCs and reference.
This pin should be tied to the analog ground plane of the PCB. The analog ground plane is the ground reference
for all analog circuitry, for example, antialiasing filters and current and voltage transducers. For good noise
suppression, the analog ground plane should be connected to the digital ground plane at one point only. A
star ground configuration helps to keep noisy digital currents away from the analog circuits.
12 SCF
Select Calibration Frequency. This logic input is used to select the frequency on the calibration output, CF.
Table 8 shows how the calibration frequencies are selected.
13, 14
S1, S0
These logic inputs are used to select one of four possible frequencies for the digital-to-frequency conversion.
This offers the designer greater flexibility when designing the energy meter. See the Selecting a Frequency for
an Energy Meter Application section.
15, 16
G1, G0
These logic inputs are used to select one of four possible gains for Channel 1, that is, V1. The possible gains
are 1, 2, 8, and 16. See the Analog Inputs section.
Rev. A | Page 6 of 20

6 Page









ADE7755 pdf, datenblatt
ADE7755
THEORY OF OPERATION
The two ADCs of the ADE7755 digitize the voltage signals from
the current and voltage transducers. These ADCs are 16-bit,
second-order Σ-Δ with an oversampling rate of 900 kHz. This
analog input structure greatly simplifies transducer interfacing
by providing a wide dynamic range for direct connection to the
transducer and also by simplifying the antialiasing filter design.
A programmable gain stage in the current channel further
facilitates easy transducer interfacing. A high-pass filter in the
current channel removes any dc components from the current
signal. This removal eliminates any inaccuracies in the active
power calculation due to offsets in the voltage or current signals
(see the HPF and Offset Effects section).
The active power calculation is derived from the instantaneous
power signal. The instantaneous power signal is generated by a
direct multiplication of the current and voltage signals. To
extract the active power component (that is, the dc component),
the instantaneous power signal is low-pass filtered. Figure 22
illustrates the instantaneous active power signal and shows how
the active power information can be extracted by low-pass filtering
the instantaneous power signal. This scheme correctly calculates
active power for nonsinusoidal current and voltage waveforms
at all power factors. All signal processing is carried out in the
digital domain for superior stability over temperature and time.
CH1 PGA
CH2
ADC
HPF
MULTIPLIER
ADC
LPF
DIGITAL-TO-
FREQUENCY
F1
F2
DIGITAL-TO-
FREQUENCY
CF
V×I
V×I
2
INSTANTANEOUS
POWER SIGNAL {p(t)}
INSTANTANEOUS ACTIVE
POWER SIGNAL
TIME
p(t) = i(t) × v(t)
WHERE:
v(t) = V × cos(ωt)
i(t) = I × cos(ωt)
p(t)
=
2
I
{1+cos
(2ωt)}
V×I
2
Figure 22. Signal Processing Block Diagram
The low frequency output of the ADE7755 is generated by
accumulating this active power information. This low frequency
inherently means a long accumulation time between output
pulses. The output frequency is therefore proportional to the
average active power. This average active power information
can, in turn, be accumulated (for example, by a counter) to
generate active energy information. Because of its high output
frequency and shorter integration time, the calibration frequency
(CF) output is proportional to the instantaneous active power.
This is useful for system calibration purposes that take place
under steady load conditions.
POWER FACTOR CONSIDERATIONS
The method used to extract the active power information from
the instantaneous power signal (that is, by low-pass filtering) is
valid even when the voltage and current signals are not in phase.
Figure 23 displays the unity power factor condition and a
displacement power factor (DPF) = 0.5, that is, current signal
lagging the voltage by 60°. Assuming that the voltage and current
waveforms are sinusoidal, the active power component of the
instantaneous power signal (that is, the dc term) is given by
⎜⎛ V × I ⎟⎞ × cos(60°)
2
This is the correct active power calculation.
INSTANTANEOUS
POWER SIGNAL
INSTANTANEOUS ACTIVE
POWER SIGNAL
V×I
2
0V
CURRENT
VOLTAGE
INSTANTANEOUS
POWER SIGNAL
INSTANTANEOUS ACTIVE
POWER SIGNAL
2
I
cos(60°)
0V
VOLTAGE
CURRENT
60°
Figure 23. DC Component of Instantaneous Power Signal Conveys
Active Power Information PF < 1
Rev. A | Page 12 of 20

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