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PDF ADC76 Data sheet ( Hoja de datos )
| Número de pieza | ADC76 | |
| Descripción | 16-Bit ANALOG-TO-DIGITAL CONVERTER | |
| Fabricantes | Burr-Brown Corporation | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de ADC76 (archivo pdf) en la parte inferior de esta página. Total 8 Páginas | ||
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® ADC76
16-Bit
ANALOG-TO-DIGITAL CONVERTER
FEATURES
q 16-BIT RESOLUTION
q LINEARITY ERROR: ±0.003% max (KG, BG)
q NO MISSING CODES GUARANTEED
FROM –25°C TO +85°C
q 17µs CONVERSION TIME (16-Bit)
q SERIAL AND PARALLEL OUTPUTS
DESCRIPTION
The ADC76 is a high quality, 16-bit successive ap-
proximation analog-to-digital converter. The ADC76
uses state-of-the-art laser-trimmed IC thin-film resis-
tors and is packaged in a hermetic 32-pin dual-in-line
package. The converter is complete with internal ref-
erence, short cycling capabilities, serial output, and
thin-film scaling resistors, which allow selection of
analog input ranges of ±2.5V, ±5V, ±10V, 0 to +5V,
0 to +10V and 0 to +20V.
It is specified for operation over two temperature
ranges: 0°C to +70°C (J, K) and –25°C to +85°C (A, B).
Data is available in parallel and serial form with
corresponding clock and status output. All digital
inputs and outputs are TTL-compatible.
Power supply voltages are ±15VDC and +5VDC.
Parallel
Digital
Output
16-Bit
Successive Approx.
Register (SAR)
16-Bit D/A
Converter
Reference
–
+
Short Cycle
Convert Command
}Input Range
Select
Comparator In
Clock
Clock Rate Control
Clock Out
Status
Serial Out
International Airport Industrial Park • Mailing Address: PO Box 11400 • Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd. • Tucson, AZ 85706
Tel: (520) 746-1111 • Twx: 910-952-1111 • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132
©1990 Burr-Brown Corporation
PDS-1063A
Printed in U.S.A. December, 1993
1 page  
TYPICAL PERFORMANCE CURVES
TA = +25°C, VCC = ±15V unless otherwise noted.
+0.08
+0.04
GAIN DRIFT ERROR (% OF FSR)
vs TEMPERATURE
POWER SUPPLY REJECTION vs
SUPPLY RIPPLE FREQUENCY
0.1
0.06
0.04
–15VDC
0.02
0
–0.04
–0.08
–0.12
–25
+25
Temperature (°C)
0.01 +15VDC
0.006
0N.004OTE: Pages
4&50.002 were
+5VDC
0.001
switched for+85 1 10 100 1k 10k 100k
Frequency (Hz)
abridge version
THEORY OF OPERATION
for '96 data book.
The accuracy of a successive approximation A/D converter
is described by the transfer function shown in Figure 1. All
successive approximation A/ D converters have an inherent
quantization error of ±1/ 2LSB. The remaining errors in the
A/ D converter are combinations of analog errors due to the
linear circuitry, matching and tracking properties of the
ladder and scaling networks, power supply rejection, and
reference errors. In summary, these errors consist of initial
errors including Gain, Offset, Linearity, Differential Linear-
ity, and Power Supply Sensitivity. Initial Gain and Offset
errors may be adjusted to zero. Gain drift over temperature
rotates the line (Figure l) about the zero or minus full scale
point (all bits Off) and Offset drift shifts the line left or right
over the operating temperature range. Linearity error is
unadjustable and is the most meaningful indicator of A/ D
converter accuracy. Linearity error is the deviation of an
actual bit transition from the ideal transition value at any
level over the range of the A/ D converter. A differential
linearity error of ±1/ 2LSB means that the width of each bit
step over the range of the A/ D converter is 1LSB, ±1/ 2LSB.
0000 ... 0000
0000 ... 0001
0011 ... 1100
0011 ... 1110
0111 ... 1111
1000 ... 0000
1000 ... 0001
–1/2LSB
Offset
Error
All Bit On
Gain
Error
+1/2LSB
Be sure to switchThe ADC76 is also monotonic, assuring that the output
digital code either increases or remains the same for increas-
back for full PDS.ing analog input signals. Burr-Brown also guarantees that
this converter will have no missing codes over a specified
temperature range when short cycled for 14-bit operation
TIMING CONSIDERATIONS
The timing diagram in Figure 2 assumes an analog input
such that the positive true digital word 1001 1000 1001 0110
exists. The output will be complementary as shown in Figure
2 (0110 0111 0110 1001 is the digital output). Figures 3 and
4 are timing diagrams showing the relationship of serial data
to clock, and valid data to status.
DIGITAL CODES
Parallel Data
Two binary codes are available on the ADC76 parallel
output: they are complementary (logic “0” is true) straight
binary (CSB) for unipolar input signal ranges, and comple-
mentary offset binary (COB) for bipolar input signal ranges.
Complementary two’s complement (CTC) may be obtained
by inverting the MSB (pin 1).
Table I shows the LSB, transition values, and code defini-
tions for each possible analog input signal range for 12-, 13-
and 14-bit resolutions. Figure 5 shows the connections for
14-bit resolution, parallel data output, with ±10V input.
1111 ... 1110
1111 ... 1111
All Bits Off
eIN On
Serial Data
Two straight binary (complementary) codes are available on
–FSR/2
Analog Input +FSR/2–1LSB
eIN Off
the serial output line: CSB and COB. The serial data is
available only during conversion and appears with MSB
*See Table I for Digital Code Definitions.
occurring first. The serial data is synchronous with the
internal clock as shown in the timing diagrams of Figures 2
FIGURE 1. Input vs Output for an Ideal Bipolar A/ D and 3. The LSB and transition values shown in Table I also
Converter.
apply to the serial data output except for the CTC code.
®
5 ADC76
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet ADC76.PDF ] | |
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