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ADC20461CIWM Schematic ( PDF Datasheet ) - National Semiconductor

Teilenummer ADC20461CIWM
Beschreibung 10-Bit 600 ns A/D Converter with Input Multiplexer and Sample/Hold
Hersteller National Semiconductor
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Gesamt 15 Seiten
ADC20461CIWM Datasheet, Funktion
June 1999
ADC10461/ADC10462/ADC10464
10-Bit 600 ns A/D Converter with Input Multiplexer and
Sample/Hold
General Description
Using an innovative, patented multistep* conversion tech-
nique, the 10-bit ADC10461, ADC10462, and ADC10464
CMOS analog-to-digital converters offer sub-microsecond
conversion times yet dissipate a maximum of only 235 mW.
The ADC10461, ADC10462, and ADC10464 perform a
10-bit conversion in two lower-resolution “flashes”, thus
yielding a fast A/D without the cost, power dissipation, and
other problems associated with true flash approaches. Dy-
namic performance (THD, S/N) is guaranteed. The
ADC10461 is pin-compatible with the ADC1061 but much
faster, thus providing a convenient upgrade path for the
ADC1061.
The analog input voltage to the ADC10461, ADC10462, and
ADC10464 is sampled and held by an internal sampling cir-
cuit. Input signals at frequencies from dc to over 200 kHz
can therefore be digitized accurately without the need for an
external sample-and-hold circuit.
The ADC10462 and ADC10464 include a “speed-up” pin.
Connecting an external resistor between this pin and ground
reduces the typical conversion time to as little as 350 ns with
only a small increase in linearity error.
For ease of interface to microprocessors, the ADC10461,
ADC10462, and ADC10464 have been designed to appear
as a memory location or I/O port without the need for exter-
nal interface logic.
Features
n Built-in sample-and-hold
n Single +5V supply
n 1, 2, or 4-input multiplexer options
n No external clock required
n Speed adjust pin for faster conversions (ADC10462 and
ADC10464)
Key Specifications
n Conversion time to 10 bits
n Sampling Rate
n Low power dissipation
n Total harmonic distortion (50 kHz)
n No missing codes over temperature
600 ns typical
800 kHz
235 mW (max)
−60 dB (max)
Applications
n Digital signal processor front ends
n Instrumentation
n Disk drives
n Mobile telecommunications
Note: *U.S. Patent Number 4918449
Ordering Information
Industrial Temp Range
(−40˚C TA +85˚C)
ADC20461CIWM
ADC20462CIWM
ADC20464CIWM
Package
M20B Small Outline
M24B Small Outline
M28B Small Outline
TRI-STATE® is a registered trademark of National Semiconductor Corporation.
© 1999 National Semiconductor Corporation DS011108
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ADC20461CIWM Datasheet, Funktion
Typical Performance Characteristics
Zero (Offset) Error
vs Reference Voltage
Linearity Error
vs Reference Voltage
Analog Supply Current
vs Temperature
DS011108-15
Digital Supply Current
vs Temperature
Conversion Time
vs Temperature
DS011108-16
Conversion Time
vs Temperature
DS011108-17
DS011108-18
Conversion Time
vs Speed-Up Resistor
(ADC10462 and ADC10464 Only)
DS011108-19
Conversion Time
vs Speed-Up Resistor
(ADC10462 and ADC10464 Only)
DS011108-20
Spectral Response with
100 kHz Sine Wave Input
DS011108-21
DS011108-22
DS011108-23
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ADC20461CIWM pdf, datenblatt
Applications Information (Continued)
DS011108-14
FIGURE 4. Typical Connection. Note the multiple bypass capacitors on the reference and power supply pins. If VREF−
is not grounded, it should also be bypassed to analog ground using multiple capacitors (see 5.0 “Power Supply
Considerations”). AGND and DGND should be at the same potential. VIN0 is shown with an input protection network.
Pin 17 is normally left open, but optional “speedup” resistor RSA can be used to reduce the conversion time.
4.0 INHERENT SAMPLE-AND-HOLD
Because the ADC10461, ADC10462, and ADC10464
sample the input signal once during each conversion, they
are capable of measuring relatively fast input signals without
the help of an external sample-hold. In a non-sampling
successive-approximation A/D converter, regardless of
speed, the input signal must be stable to better than ±1/2
LSB during each conversion cycle or significant errors will
result. Consequently, even for many relatively slow input sig-
nals, the signals must be externally sampled and held con-
stant during each conversion if a SAR with no internal
sample-and-hold is used.
Because they incorporate a direct sample/hold control input,
the ADC10461, ADC10462, and ADC10464 are suitable for
use in DSP-based systems. The S /H input allows synchro-
nization of the A/D converter to the DSP system’s sampling
rate and to other ADC10461s, ADC10462s, and
ADC10464s.
The ADC10461, ADC10462, and ADC10464 can perform ac-
curate conversions of input signals with frequency compo-
nents from DC to over 250 kHz.
5.0 POWER SUPPLY CONSIDERATIONS
The ADC10461, ADC10462, and ADC10464 are designed to
operate from a +5V (nominal) power supply. There are two
supply pins, AVCC and DVCC. These pins allow separate ex-
ternal bypass capacitors for the analog and digital portions of
the circuit. To guarantee accurate conversions, the two sup-
ply pins should be connected to the same voltage source,
and each should be bypassed with a 0.1 µF ceramic capaci-
tor in parallel with a 10 µF tantalum capacitor. Depending on
the circuit board layout and other system considerations,
more bypassing may be necessary.
The ADC10461 has a single ground pin, and the ADC10462
and ADC10464 each have separate analog and digital
ground pins for separate bypassing of the analog and digital
supplies. The devices with separate analog and digital
ground pins should have their ground pins connected to the
same potential, and all grounds should be “clean” and free of
noise.
In systems with multiple power supplies, careful attention to
power supply sequencing may be necessary to avoid over-
driving inputs. The A/D converter’s power supply pins should
be at the proper voltage before digital or analog signals are
applied to any of the other pins.
6.0 LAYOUT AND GROUNDING
In order to ensure fast, accurate conversions from the
ADC10461, ADC10462, and ADC10464, it is necessary to
use appropriate circuit board layout techniques. The analog
ground return path should be low-impedance and free of
noise from other parts of the system. Noise from digital cir-
cuitry can be especially troublesome, so digital grounds
should always be separate from analog grounds. For best
performance, separate ground planes should be provided for
the digital and analog parts of the system.
All bypass capacitors should be located as close to the con-
verter as possible and should connect to the converter and
to ground with short traces. The analog input should be iso-
lated from noisy signal traces to avoid having spurious sig-
nals couple to the input. Any external component (e.g., a fil-
ter capacitor) connected across the converter’s input should
be connected to a very clean ground return point. Grounding
the component at the wrong point will result in reduced con-
version accuracy.
7.0 DYNAMIC PERFORMANCE
Many applications require the A/D converter to digitize AC
signals, but conventional DC integral and differential nonlin-
earity specifications don’t accurately predict the A/D convert-
er’s performance with AC input signals. The important speci-
fications for AC applications reflect the converter’s ability to
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