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PDF ADC12L066CIVYX Data sheet ( Hoja de datos )

Número de pieza ADC12L066CIVYX
Descripción 12-Bit/ 66 MSPS/ 450 MHz Bandwidth A/D Converter with Internal Sample-and-Hold
Fabricantes National Semiconductor 
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December 2003
ADC12L066
12-Bit, 66 MSPS, 450 MHz Bandwidth A/D Converter with
Internal Sample-and-Hold
General Description
The ADC12L066 is a monolithic CMOS analog-to-digital con-
verter capable of converting analog input signals into 12-bit
digital words at 66 Megasamples per second (MSPS), mini-
mum, with typical operation possible up to 80 MSPS. This
converter uses a differential, pipeline architecture with digital
error correction and an on-chip sample-and-hold circuit to
minimize die size and power consumption while providing
excellent dynamic performance. A unique sample-and-hold
stage yields a full-power bandwidth of 450 MHz. Operating
on a single 3.3V power supply, this device consumes just
357 mW at 66 MSPS, including the reference current. The
Power Down feature reduces power consumption to just
50 mW.
The differential inputs provide a full scale input swing equal
to ±VREF with the possibility of a single-ended input. Full use
of the differential input is recommended for optimum perfor-
mance. For ease of use, the buffered, high impedance,
single-ended reference input is converted on-chip to a differ-
ential reference for use by the processing circuitry. Output
data format is 12-bit offset binary.
This device is available in the 32-lead LQFP package and
will operate over the industrial temperature range of −40˚C to
+85˚C. An evaluation board is available to facilitate the
evaluation process.
Features
n Single supply operation
n Low power consumption
n Power down mode
n On-chip reference buffer
Key Specifications
n Resolution
n Conversion Rate
n Full Power Bandwidth
n DNL
n SNR (fIN = 10 MHz)
n SFDR (fIN = 10 MHz)
n Data Latency
n Supply Voltage
n Power Consumption, 66 MHz
12 Bits
66 MSPS
450 MHz
±0.4 LSB (typ)
66 dB (typ)
80 dB (typ)
6 Clock Cycles
+3.3V ± 300 mV
357 mW (typ)
Applications
n Ultrasound and Imaging
n Instrumentation
n Cellular Base Stations/Communications Receivers
n Sonar/Radar
n xDSL
n Wireless Local Loops
n Data Acquisition Systems
n DSP Front Ends
Connection Diagram
TRI-STATE® is a registered trademark of National Semiconductor Corporation.
© 2003 National Semiconductor Corporation DS200328
20032801
www.national.com

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ADC12L066CIVYX pdf
Absolute Maximum Ratings (Notes 1,
2)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
VA, VD, VDR
|VA–VD|
Voltage on Any Pin
Input Current at Any Pin (Note 3)
Package Input Current (Note 3)
Package Dissipation at TA = 25˚C
ESD Susceptibility
Human Body Model (Note 5)
Machine Model (Note 5)
Soldering Temperature,
Infrared, 10 sec. (Note 6)
Storage Temperature
4.2V
100 mV
−0.3V to (VA or VD
+0.3V)
±25 mA
±50 mA
See (Note 4)
2500V
250V
235˚C
−65˚C to +150˚C
Operating Ratings (Notes 1, 2)
Operating Temperature
Supply Voltage (VA, VD)
Output Driver Supply (VDR)
VREF Input
CLK, PD, OE
VIN Input
VCM
|AGND–DGND|
−40˚C TA +85˚C
+3.0V to +3.60V
+1.8V to VD
0.8V to 1.5V
−0.05V to (VD + 0.05V)
−0V to (VA − 0.5V)
0.5V to (VA -1.5V)
100 mV
Converter Electrical Characteristics
Unless otherwise specified, the following specifications apply for AGND = DGND = DR GND = 0V, VA = VD = +3.3V,
VDR = +2.5V, PD = 0V, VREF = +1.0V, VCM = 1.0V, fCLK = 66 MHz, tr = tf = 2 ns, CL = 15 pF/pin. Boldface limits apply for TJ
= TMIN to TMAX: all other limits TJ = 25˚C (Notes 7, 8, 9, 10)
Symbol
Parameter
Conditions
Typical Limits
(Note 10) (Note 10)
Units
(Limits)
STATIC CONVERTER CHARACTERISTICS
Resolution with No Missing Codes
12 Bits
INL Integral Non Linearity (Note 11)
±1.2
+2.7
−3
LSB (max)
LSB (min)
DNL
Differential Non Linearity
±0.4
+1
−0.95
LSB (max)
LSB (min)
Positive Error
−0.15
±3 %FS (max)
GE Gain Error
Negative Error
+0.4
+4 %FS (max)
−5 %FS (min)
Offset Error (VIN+ = VIN−)
Under Range Output Code
+0.2
±1.3
%FS (max)
00
Over Range Output Code
4095
4095
REFERENCE AND ANALOG INPUT CHARACTERISTICS
VCM Common Mode Input Voltage
0.5 V (min)
1.0
1.5 V (max)
CIN
VIN Input Capacitance (each pin to
GND)
VIN + 1.0 Vdc
+ 1 VP-P
(CLK LOW)
(CLK HIGH)
8
7
pF
pF
VREF
Reference Voltage (Note 13)
0.8 V (min)
1.0
1.5 V (max)
Reference Input Resistance
100 M(min)
5 www.national.com

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ADC12L066CIVYX arduino
Timing Diagram
Transfer Characteristic
Output Timing
20032809
FIGURE 1. Transfer Characteristic
20032810
11 www.national.com

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