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ADC12062EVAL Schematic ( PDF Datasheet ) - National Semiconductor

Teilenummer ADC12062EVAL
Beschreibung 12-Bit/ 1 MHz/ 75 mW A/D Converter
Hersteller National Semiconductor
Logo National Semiconductor Logo 




Gesamt 20 Seiten
ADC12062EVAL Datasheet, Funktion
December 1994
ADC12062
12-Bit 1 MHz 75 mW A D Converter
with Input Multiplexer and Sample Hold
General Description
Using an innovative multistep conversion technique the
12-bit ADC12062 CMOS analog-to-digital converter digitizes
signals at a 1 MHz sampling rate while consuming a maxi-
mum of only 75 mW on a single a5V supply The
ADC12062 performs a 12-bit conversion in three lower-res-
olution ‘‘flash’’ conversions yielding a fast A D without the
cost and power dissipation associated with true flash ap-
proaches
The analog input voltage to the ADC12062 is tracked and
held by an internal sampling circuit allowing high frequency
input signals to be accurately digitized without the need for
an external sample-and-hold circuit The multiplexer output
is available to the user in order to perform additional exter-
nal signal processing before the signal is digitized
When the converter is not digitizing signals it can be placed
in the Standby mode typical power consumption in this
mode is 100 mW
Block Diagram
Features
Y Built-in sample-and-hold
Y Single a5V supply
Y Single channel or 2 channel multiplexer operation
Y Low Power Standby mode
Key Specifications
Y Sampling rate
Y Conversion time
Y Signal-to-Noise Ratio fIN e 100 kHz
Y Power dissipation (fs e 1 MHz)
Y No missing codes over temperature
1 MHz (min)
740 ns (typ)
69 5 dB (min)
75 mW (max)
Guaranteed
Applications
Y Digital signal processor front ends
Y Instrumentation
Y Disk drives
Y Mobile telecommunications
Y Waveform digitizers
Ordering Information
Industrial (b40 C s TA s a85 )
ADC12062BIV
ADC12062BIVF
ADC12062CIV
ADC12062CIVF
ADC12062EVAL
TRI-STATE is a registered trademark of National Semiconductor Corporation
C1995 National Semiconductor Corporation TL H 11490
Package
V44 Plastic Leaded Chip Carrier
VGZ44A Plastic Quad Flat Package
V44 Plastic Leaded Chip Carrier
VGZ44A Plastic Quad Flat Package
Evaluation Board
TL H 11490 – 1
RRD-B30M75 Printed in U S A






ADC12062EVAL Datasheet, Funktion
Typical Performance Characteristics
Offset and Fullscale
Error Change vs
Reference Voltage
Linearity Error Change
vs Reference Voltage
Mux ON Resistance vs
Input Voltage
Digital Supply Current
vs Temperature
Analog Supply Current
vs Temperature
Current Consumption in
Standby Mode vs Voltage
on Digital Input Pins
Conversion Time (tCONV)
vs Temperature
EOC Delay Time (tEOC)
vs Temperature
Spectral Response
SINAD vs Input Frequency
(ADC IN)
SNR vs Input Frequency
(ADC IN)
THD vs Input Frequency
(ADC IN)
TL H 11490 – 27
6

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ADC12062EVAL pdf, datenblatt
Applications Information (Continued)
FIGURE 6 ADC Control Logic
TL H 11490 – 16
2 0 THE ANALOG INPUT
The analog input of the ADC12062 can be modeled as two
small resistances in series with the capacitance of the input
hold capacitor (CIN) as shown in Figure 7 The S H switch
is closed during the Sample period and open during Hold
The source has to charge CIN to the input voltage within the
sample period Note that the source impedance of the input
voltage (RSOURCE) has a direct effect on the time it takes to
charge CIN If RSOURCE is too large the voltage across CIN
will not settle to within 0 5 LSBs of VSOURCE before the
conversion begins and the conversion results will be incor-
rect From a dynamic performance viewpoint the combina-
tion of RSOURCE RMUX RSW and CIN form a low pass
filter Minimizing RSOURCE will increase the frequency re-
sponse of the input stage of the converter
Typical values for the components shown in Figure 7 are
RMUX e 100X RSW e 100X and CIN e 25 pF The set-
tling time to n bits is
tSETTLE e (RSOURCE a RMUX a RSW) CIN n ln (2)
The bandwidth of the input circuit is
fb3dB e 1 (2 3 14 (RSOURCE a RMUX a RSW) CIN)
For maximum performance the impedance of the source
driving the ADC12062 should be made as small as possible
A source impedance of 100X or less is recommended A
plot of dynamic performance vs source impedance is given
in the Typical Performance Characteristics section
If the signal source has a high output impedance its output
should be buffered with an operational amplifier capable of
driving a switched 25 pF 100X load Any ringing or instabili-
ties at the op amp’s output during the sampling period can
result in conversion errors The LM6361 high speed op amp
is a good choice for this application due to its speed and its
ability to drive large capacitive loads Figure 8 shows the
LM6361 driving the ADC IN input of an ADC12062 The
100 pF capacitor at the input of the converter absorbs some
of the high frequency transients generated by the S H
switching reducing the op amp transient response require-
ments The 100 pF capacitor should only be used with high
speed op amps that are unconditionally stable driving ca-
pacitive loads
FIGURE 7 Simplified ADC12062 Input Stage
12
TL H 11490 – 17

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