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PDF ADC12041CIMSA Data sheet ( Hoja de datos )

Número de pieza ADC12041CIMSA
Descripción 12-Bit Plus Sign 216 kHz Sampling Analog-to-Digital Converter
Fabricantes National Semiconductor 
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No Preview Available ! ADC12041CIMSA Hoja de datos, Descripción, Manual

April 2000
ADC12041
12-Bit Plus Sign 216 kHz Sampling Analog-to-Digital
Converter
General Description
Operating from a single 5V power supply, the ADC12041 is a
12 bit + sign, parallel I/O, self-calibrating, sampling
analog-to-digital converter (ADC). The maximum sampling
rate is 216 kHz. On request, the ADC goes through a
self-calibration process that adjusts linearity, zero and
full-scale errors.
The ADC12041 can be configured to work with many popular
microprocessors/microcontrollers and DSPs including Na-
tional’s HPC family, Intel386 and 8051, TMS320C25, Mo-
torola MC68HC11/16, Hitachi 64180 and Analog Devices
ADSP21xx.
For complementary voltage references see the LM4040,
LM4041 or LM9140.
Features
n Fully differential analog input
n Programmable acquisition times and user-controllable
throughput rates
n Programmable data bus width (8/13 bits)
n Built-in Sample-and-Hold
n Programmable auto-calibration and auto-zero cycles
n Low power standby mode
n No missing codes
Key Specifications
(fCLK = 12 MHz)
n Resolution
n 13-bit conversion time
n 13-bit throughput rate
n Integral Linearity Error (ILE)
n Single supply
n VIN range
n Power consumption
— Normal operation
— Stand-by mode
Applications
n Medical instrumentation
n Process control systems
n Test equipment
n Data logging
n Inertial guidance
12-bits + sign
3.6 µs, max
216 ksamples/s, min
±1 LSB, max
+5V ± 10%
GND to VA+
33 mW, max
75 µw, max
Block Diagram
TRI-STATE® is a registered trademark of National Semiconductor Corporation.
© 2000 National Semiconductor Corporation DS012441
DS012441-1
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ADC12041CIMSA pdf
Power Supply Characteristics (Continued)
The following specifications apply to the ADC12041 for VA+ = VD+ = 5V, VREF+ = 4.096V, VREF− = 0.0V, 12-bit + sign conver-
sion mode, fCLK = 12.0 MHz, RS = 25, source impedance for VREF+ and VREF− 1, fully differential input with fixed 2.048V
common-mode voltage, and minimum acquisition time, unless otherwise specified. Boldface limits apply for TA = TJ = TMIN
to TMAX; all other limits TA = TJ = 25˚C
Symbol
Parameter
Conditions
Typical
Limits
Unit
(Note 10) (Note 11)
(Limit)
IA+ VA+ Analog Supply Current Start Command (Performing a conversion)
with SYNC configured as an input and driven
with a 214 kHz signal. Bus width set to 13.
fCLK = 12.0 MHz, Reset Mode
fCLK = 12.0 MHz, Conversion
IST
Standby Supply Current
Standby Mode
(ID+ + IA+)
fCLK = Stopped
fCLK = 12.0 MHz
2.3 mA
2.3 4.0 mA (max)
5 15 µA (max)
100 120 µA (max)
Analog Input Characteristics
The following specifications apply to the ADC12041 for VA+ = VD+ = 5V, VREF+ = 4.096V, VREF− = 0.0V, 12-Bit + sign conver-
sion mode, fCLK = 12.0 MHz, RS = 25, source impedance for VREF+ and VREF+ 1, fully differential input with fixed 2.048V
common-mode voltage, and minimum acquisition time, unless otherwise specified. Boldface limits apply for TA = TJ = TMIN
to TMAX; all other limits TA = TJ = 25˚C
Symbol
Parameter
Conditions
Typical
Limits
Unit
(Note 10) (Note 11) (Limit)
IIN
RON
VIN+ and VIN− Input Leakage Current
ADC Input On Resistance
VIN+ = 5V
VIN− = 0V
VIN = 2.5V
Refer to section titled INPUT CURRENT.
±0.05
1000
2.0 µA (max)
CVIN ADC Input Capacitance
10 pF
Reference Inputs
The following specifications apply to the ADC12041 for VA+ = VD+ = 5V, VREF+ = 4.096V, VREF− = 0.0V, 12-bit + sign con-
version mode, fCLK = 12.0 MHz, RS = 25, source impedance for VREF+ and VREF1, fully differential input with fixed
2.048V common-mode voltage, and minimum acquisition time, unless otherwise specified. Boldface limits apply for TA = TJ
= TMIN to TMAX; all other limits TA = TJ = 25˚C
Symbol
Parameter
Conditions
Typical
Limits
Unit
(Note 10)
(Note 11)
(Limit)
IREF Reference Input Current
VREF+ 4.096V, VREF− = 0V
Analog Input Signal: 1 kHz
145
µA
(Note 20) 80 kHz
136
µA
CREF
Reference Input Capacitance
85 pF
Digital Logic Input/Output Characteristics
The following specifications apply to the ADC12041 for VA+ = VD+ = 5V, VREF+ = 4.096V, VREF− = 0.0V, 12-bit + sign con-
version mode, fCLK = 12.0 MHz, RS = 25, source impedance for VREF+ and VREF1, fully differential input with fixed
2.048V common-mode voltage, and minimum acquisition time, unless otherwise specified. Boldface limits apply for TA = TJ
= TMIN to TMAX; all other limits TA = TJ = 25˚C
Symbol
Parameter
Conditions
Typical
Limits
Unit
(Note 10)
(Note 11)
(Limit)
VIH Logic High Input Voltage
VIL Logic Low Input Voltage
IIH Logic High Input Current
IIL Logic Low Input Current
VOH Logic High Output Voltage
VA+ = VD+ = 5.5V
VA+ = VD+ = 4.5V
VIN = 5V
VIN = 0V
VA+ = VD+ = 4.5V
IOUT = −1.6 mA
0.035
−0.035
2.4
2.2
0.8
2.0
−2.0
2.4
V (min)
V (max)
µA (max)
µA (max)
V (min)
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ADC12041CIMSA arduino
Electrical Characteristics (Continued)
DS012441-10
FIGURE 6. Simplified Error vs Output Code without Auto-Calibration or Auto-Zero Cycles
FIGURE 7. Simplified Error vs Output Code after Auto-Calibration Cycle
DS012441-11
DS012441-12
FIGURE 8. Offset or Zero Error Voltage (Note 13)
11
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