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PDF ADC12040CIVYX Data sheet ( Hoja de datos )

Número de pieza ADC12040CIVYX
Descripción 12-Bit/ 40 MSPS/ 340 mW A/D Converter with Internal Sample-and-Hold
Fabricantes National Semiconductor 
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No Preview Available ! ADC12040CIVYX Hoja de datos, Descripción, Manual

June 2003
ADC12040
12-Bit, 40 MSPS, 340 mW A/D Converter with Internal
Sample-and-Hold
General Description
The ADC12040 is a monolithic CMOS analog-to-digital con-
verter capable of converting analog input signals into 12-bit
digital words at 40 Megasamples per second (MSPS), mini-
mum. This converter uses a differential, pipeline architecture
with digital error correction and an on-chip sample-and-hold
circuit to minimize die size and power consumption while
providing excellent dynamic performance. Operating on a
single 5V power supply, this device consumes just 340 mW
at 40 MSPS, including the reference current. The Power
Down feature reduces power consumption to 40 mW.
The differential inputs provide a full scale input swing equal
to VREF with the possibility of a single-ended input. Full use
of the differential input is recommended for optimum perfor-
mance. For ease of use, the buffered, high impedance,
single-ended reference input is converted on-chip to a differ-
ential reference for use by the processing circuitry. Output
data format is 12-bit offset binary.
This device is available in the 32-lead LQFP package and
will operate over the industrial temperature range of −40˚C to
+85˚C.
Features
n Single supply operation
n Internal sample-and-hold
n Outputs 2.5V to 5V compatible
n TTL/CMOS compatible input/outputs
n Low power consumption
n Power down mode
n On-chip reference buffer
Key Specifications
n Resolution
n Conversion Rate
n DNL
n INL
n SNR (fIN = 10MHz)
n ENOB (fIN = 10MHz)
n Data Latency
n Supply Voltage
n Power Consumption, 40 MHz
12 Bits
40 MSPS (min)
±0.4 LSB (typ)
±0.7 LSB (typ)
69 dB (typ)
11.2 bits (typ)
6 Clock Cycles
+5V ±5%
340 mW (typ)
Applications
n Ultrasound and Imaging
n Instrumentation
n Cellular Base Stations/Communications Receivers
n Sonar/Radar
n xDSL
n Wireless Local Loops/Cable Modems
n HDTV/DTV
n DSP Front Ends
Connection Diagram
© 2003 National Semiconductor Corporation DS200148
20014801
www.national.com

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ADC12040CIVYX pdf
Absolute Maximum Ratings (Notes 1,
2)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
VA, VD, VDR
|VA–VD|
Voltage on Any Input or Output Pin
Input Current at Any Pin (Note 3)
Package Input Current (Note 3)
Package Dissipation at TA = 25˚C
ESD Susceptibility
Human Body Model (Note 5)
Machine Model (Note 5)
Soldering Temperature,
Infrared, 10 sec. (Note 6)
Storage Temperature
6.5V
100 mV
−0.3V to (VA or VD
+0.3V)
±25 mA
±50 mA
See (Note 4)
2500V
250V
235˚C
−65˚C to +150˚C
Operating Ratings (Notes 1, 2)
Operating Temperature
Supply Voltage (VA, VD)
Output Driver Supply (VDR)
VREF Input
CLK, PD, OE
VIN Input
|AGND–DGND|
−40˚C TA +85˚C
+4.75V to +5.25V
+2.35V to VD
1.0V to 2.2V
−0.05V to (VD + 0.05V)
−0V to (VA − 0.5V)
100mV
Converter Electrical Characteristics
Unless otherwise specified, the following specifications apply for AGND = DGND = DR GND = 0V, VA = VD = +5V, VDR =
+3.0V, PD = 0V, VREF = +2.0V, fCLK = 40 MHz, tr = tf = 3 ns, CL = 20 pF/pin. Boldface limits apply for TA = TJ = TMIN to
TMAX: all other limits TA = TJ = 25˚C (Notes 7, 8, 9)
Symbol
Parameter
Conditions
Typical Limits
(Note 10) (Note 10)
Units
(Limits)
STATIC CONVERTER CHARACTERISTICS
Resolution with No Missing Codes
12 Bits (min)
INL Integral Non Linearity (Note 11)
±0.7
±1.8
LSB (max)
DNL
Differential Non Linearity
±0.4
±1.0
LSB (max)
GE Gain Error
±0.1
±2.1
%FS (max)
Offset Error (VIN+ = VIN−)
Under Range Output Code
−0.1
±0.9
%FS (max)
00
Over Range Output Code
4095
4095
DYNAMIC CONVERTER CHARACTERISTICS
FPBW Full Power Bandwidth
0 dBFS Input, Output at −3 dB
100
MHz
SNR
Signal-to-Noise Ratio
SINAD Signal-to-Noise and Distortion
ENOB Effective Number of Bits
THD
Total Harmonic Distortion
SFDR Spurious Free Dynamic Range
IMD Intermodulation Distortion
fIN 1 MHz, VIN −0.5 dBFS
fIN = 10 MHz, VIN = −0.5 dBFS
fIN = 1 MHz, VIN = −0.5 dBFS
fIN = 10 MHz, VIN = −0.5 dBFS
fIN = 1 MHz, VIN = −0,5 dBFS
fIN = 10 MHz, VIN = −0,5 dBFS
fIN = 1 MHz, VIN = −0,5 dBFS
fIN = 10 MHz, VIN = −0,5 dBFS
fIN = 1 MHz, VIN = −0,5 dBFS
fIN = 10 MHz, VIN = −0.5 dBFS
fIN = 9.5 MHz and 10.5 MHz,
each = −8 dBFS
70
69.5
69.5
69
11.2
11.2
−82
−80
86
84
−75
66.5
66
10.7
−67
-68
dB
dB (min)
dB
dB (min)
Bits
Bits (min)
dB
dB (max)
dB
dB (min)
dBFS
5 www.national.com

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ADC12040CIVYX arduino
Typical Performance Characteristics VA = VD = 5V, VDR = 3V, fCLK = 40 MHz, fIN = 10 MHz unless
otherwise stated
DNL
DNL vs. VA
20014818
DNL vs. Temperature
20014821
DNL vs. Clock Duty Cycle
INL
20014819
INL vs. VA
20014822
20014820
11
20014823
www.national.com

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