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ADC12010CIVY Schematic ( PDF Datasheet ) - National Semiconductor

Teilenummer ADC12010CIVY
Beschreibung 12-Bit/ 10 MSPS/ 160 mW A/D Converter with Internal Sample-and-Hold
Hersteller National Semiconductor
Logo National Semiconductor Logo 




Gesamt 22 Seiten
ADC12010CIVY Datasheet, Funktion
April 2003
ADC12010
12-Bit, 10 MSPS, 160 mW A/D Converter with Internal
Sample-and-Hold
General Description
The ADC12010 is a monolithic CMOS analog-to-digital con-
verter capable of converting analog input signals into 12-bit
digital words at 10 Megasamples per second (MSPS), mini-
mum. This converter uses a differential, pipeline architecture
with digital error correction and an on-chip sample-and-hold
circuit to minimize die size and power consumption while
providing excellent dynamic performance. Operating on a
single 5V power supply, this device consumes just 160 mW
at 10 MSPS, including the reference current. The Power
Down feature reduces power consumption to 25 mW.
The differential inputs provide a full scale input swing equal
to 2VREF with the possibility of a single-ended input. Full use
of the differential input is recommended for optimum perfor-
mance. For ease of use, the buffered, high impedance,
single-ended reference input is converted on-chip to a differ-
ential reference for use by the processing circuitry. Output
data format is 12-bit offset binary.
This device is available in the 32-lead LQFP package and
will operate over the industrial temperature range of −40˚C to
+85˚C.
Features
n Internal sample-and-hold
n Outputs 2.4V to 5V compatible
n TTL/CMOS compatible input/outputs
n Power down mode
n On-chip reference buffer
Key Specifications
n Resolution
n Conversion Rate
n DNL
n INL
n SNR (fIN = 10.1 MHz)
n ENOB (fIN = 10.1 MHz)
n Data Latency
n Supply Voltage
n Power Consumption, 10 MHz
Applications
n Image Processing Front End
n Instrumentation
n PC-Based Data Acquisition
n Fax Machines
n Wireless Local Loops/Cable Modems
n Waveform Digitizers
n DSP Front Ends
12 Bits
10 MSPS (min)
±0.3 LSB (typ)
±0.5 LSB (typ)
70 dB (typ)
11.3 bits (typ)
6 Clock Cycles
+5V ±5%
160 mW (typ)
Connection Diagram
TRI-STATE® is a registered trademark of National Semiconductor Corporation.
© 2003 National Semiconductor Corporation DS200516
20051601
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ADC12010CIVY Datasheet, Funktion
Converter Electrical Characteristics (Continued)
Unless otherwise specified, the following specifications apply for AGND = DGND = DR GND = 0V, VA = VD = +5V, VDR =
+3.0V, PD = 0V, VREF = +2.0V, fCLK = 10 MHz, tr = tf = 3 ns, CL = 25 pF/pin. Boldface limits apply for TA = TJ = TMIN to
TMAX: all other limits TA = TJ = 25˚C (Notes 7, 8, 9)
Symbol
Parameter
Conditions
Typical Limits
(Note 10) (Note 10)
Units
(Limits)
IMD Intermodulation Distortion
fIN = 4.7 MHz and 4.9 MHz,
each = −7 dBFS
−75
dBFS
REFERENCE AND ANALOG INPUT CHARACTERISTICS
VCM
CIN
VREF
Common Mode Input Voltage
VIN Input Capacitance (each pin to
GND)
Reference Voltage (Note 13)
VIN = 2.5 Vdc
+ 0.7 Vrms
(CLK LOW)
(CLK HIGH)
VA / 2
8
7
2.00
1.0
2.4
V
pF
pF
V (min)
V (max)
Reference Input Resistance
100 M(min)
DC and Logic Electrical Characteristics
Unless otherwise specified, the following specifications apply for AGND = DGND = DR GND = 0V, VA = VD = +5V, VDR =
+3.0V, PD = 0V, VREF = +2.0V, fCLK = 10 MHz, tr = tf = 3 ns, CL = 25 pF/pin. Boldface limits apply for TA = TJ = TMIN to
TMAX: all other limits TA = TJ = 25˚C (Notes 7, 8, 9)
Symbol
Parameter
Conditions
Typical Limits
(Note 10) (Note 10)
Units
(Limits)
CLK, PD, OE DIGITAL INPUT CHARACTERISTICS
VIN(1)
Logical “1” Input Voltage
VD = 5.25V
VIN(0)
Logical “0” Input Voltage
VD = 4.75V
IIN(1)
Logical “1” Input Current
VIN = 5.0V
IIN(0)
Logical “0” Input Current
VIN = 0V
CIN Digital Input Capacitance
D0–D11 DIGITAL OUTPUT CHARACTERISTICS
2.0 V (min)
1.0 V (max)
10 µA
−10 µA
5 pF
VOUT(1)
VOUT(0)
IOZ
+ISC
Logical “1” Output Voltage
Logical “0” Output Voltage
TRI-STATE Output Current
Output Short Circuit Source
Current
IOUT = −0.5 mA
IOUT = 1.6 mA, VDR = 3V
VOUT = 2.5V or 5V
VOUT = 0V
VOUT = 0V
VDR = 2.5V
VDR = 3V
100
−100
−20
2.3 V (min)
2.7 V (min)
0.4 V (max)
nA
nA
mA (min)
−ISC
Output Short Circuit Sink Current
POWER SUPPLY CHARACTERISTICS
VOUT = VDR
20 mA (min)
IA Analog Supply Current
PD Pin = DGND, VREF = 2.0V
PD Pin = VDR
30 39 mA (max)
2.8 mA
ID Digital Supply Current
PD Pin = DGND
PD Pin = VDR, fCLK = 0
2 2.5 mA (max)
2.2 mA
IDR Digital Output Supply Current
PD Pin = DGND, CL = 0 pF (Note 14)
PD Pin = VDR, fCLK = 0
0
0
mA
mA
Total Power Consumption
PD Pin = DGND, CL = 0 pF (Note 15) 160 207
PD Pin = VDR, fCLK = 0
25
mW
mW
PSRR1+ Power Supply Rejection Ratio
Rejection of Positive Full-Scale Error
with VA = 4.75V vs. 5.25V
69
dBFS
PSRR1− Power Supply Rejection Ratio
Rejection of Negative Full-Scale Error
with VA = 4.75V vs. 5.25V
51
dBFS
PSRR2 Power Supply Rejection Ratio
Rejection of Power Supply Noise with
10 MHz, 250 mVP-P riding on VA
48
dBFS
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ADC12010CIVY pdf, datenblatt
ADC12010 Typical Performance Characteristics VA = VD = 5,0V, VDR = 3.0V, fCLK = 10 MHz,
fIN = 10.1 MHz, VREF = 2.0V unless otherwise stated (Continued)
SNR vs. VREF
THD vs. Temperature
20051650
THD vs. Clock Duty Cycle
THD vs. Sample Rate
20051651
THD vs. FIN
20051652
THD vs. VREF
20051653
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20051654
12
20051655

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