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PDF ADC100CA Data sheet ( Hoja de datos )

Número de pieza ADC100CA
Descripción Precision 22 Bit Integrating A/D Converter
Fabricantes ETC 
Logotipo ETC Logotipo



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No Preview Available ! ADC100CA Hoja de datos, Descripción, Manual

ADC100
Precision 22 Bit
Integrating A/D Converter
THALER CORPORATION • 2015 N. FORBES BOULEVARD • TUCSON, AZ. 85745 • (520) 882-4000
FEATURES
· 22-BIT RESOLUTION
· ±10.48 INPUT RANGE
· 1ppm/°C MAX. SCALE FACTOR ERROR
· 2 ppm MAX. LINEARITY ERROR
· AUTO ZERO
· BUS COMPATIBLE
· INTERNAL CLOCK and REFERENCE
· LOW POWER CONSUMPTION (0.4 WATTS)
APPLICATIONS
· TEST EQUIPMENT
· DATA ACQUISITION
· SCIENTIFIC INSTRUMENTS
· MEDICAL INSTRUMENTS
· SEISMOLOGICAL EQUIPMENT
· ROBOTIC SYSTEMS
· WEIGHING SYSTEMS
DESCRIPTION
ADC100 is a high performance 22-bit A/D
converter based on a patented architecture
which provides outstanding performance
(accuracy) comparable to the best digital meters.
The ADC100 is available in two operating
temperature ranges, -25°C to +85°C and -55°C
to +125°C. "M" versions are screened for high
reliability and quality.
ADC100 offers 3 ppm max. linearity error and
1ppm/°C max. scale factor error over the military
temperature range. It also has excellent offset
stability at 2 ppm max. which the user can auto
zero if desired.
Type
Temperature
Max. Scale
Operating Range Factor Deviation
ADC100C
ADC100CA
ADC100M
-25°C to +85°C
-25°C to +85°C
-55°C to +125°C
60ppm
30ppm
100ppm
ADC100's compatibility with popular microcomputer buses increases its ease of application in smart
systems. An on-board microprocessor controls all internal functions of the ADC100. Thaler designers
have minimized external connections to greatly reduce the problem often encountered when applying
ADC's.
Operating from ±15VDC and a +5VDC power supply, ADC100 is packaged in a hermetically sealed 40-
pin ceramic DIP package. Precision test equipment, scientific and medical instruments, and data
acquisition systems are primary application areas for the unusually high resolution and accuracy of this
ADC.
ADC100DS REV. E MAR 00

1 page




ADC100CA pdf
CONNECTING THE ADC100
POWER SUPPLIES
The power supply lines are connected to pins 4-7.
Pin 4 is -15V, pin 5 is +15v, pin 6 is +5V and pin 7 is
GND.
OUTPUT DATA LINES
The output data is available in byte form on pins
13-20. Pin 20 is the Most Significant Bit and pin 13
the Least Significant Bit. The data lines go to a high
impedance state when the Output Enable line is at a
logic one level.
OUTPUT ENABLE (PIN 21)
Data is placed on the Output Data Lines by a logic
zero on this line.
CONVERT (Pin22)
This line is used to initiate a conversion cycle and
to retrieve the output data. The status lines indicate
which function will be executed. The first pulse
(transition from logic one to logic zero) starts the
conversion cycle. Two subsequent pulses are used
to place the lower two bytes on the Output Data
Lines.
AUTO-ZERO / RESET (Pin 29)
A logic zero on this input will autozero the ADC150-
3 by internally connecting the analog high to analog
low. Since the µP is reset the status lines S1 and
S0 are tristate before going to the low position. The
status lines will remain low until the autozero is
complete.
INTEGRATION CAPACITOR (Pin 34, 35)
A .68 µF polystyrene capacitor must be connected
to these pins. Lead length should be as short as
possible and not exceed 2".
ANALOG INPUTS (Pin 39, 40)
Both analog inputs are buffered by op-amps and
have a common mode rejection of approximately
80dB. min. To maintain the full accuracy at the
ADC it is recommended to keep the input to analog
common to less than 0.1VDC.
STATUS LINES (Pins 23, 24)
These lines indicate the present state of the ADC. When the Convert line receives the first pulse in a
conversion cycle the Status Lines go to logic zero, indicating that a conversion cycle is in progress. When
the conversion is complete the microprocessor places the MSB of the output data in the output buffer and
then raises S0 to a logic one, indicating that the MSB at the output data is available in the output buffer.
When the Convert Line is pulsed again the middle byte of the output data is placed in that output buffer and
S1 changes to logic one and S0 to logic zero. The third pulse places the LSB of the output data in the buffer
and both status lines go to the logic one. The converter is now ready for the next conversion cycle.
The table below shows a summary of the status code.
S1 S0
0 0 Conversion in progress.
0 1 Conversion complete. MSB in output.
1 0 Middle byte in output register.
1 1 LSB in output. Ready for next conversion.
OUTPUT DATA REPRESENTATION
The output data is represented in BOB (Bipolar Offset Binary)
format. One LSB is scaled to be exactly 5mV. The table below
shows the output data codes for zero and plus-minus full scale
input voltage.
Input Voltage
-10.485760 V
0.0 V
+10.485755 V
High Byte
00
20
3F
Output Data
Middle Byte
00
00
FF
Low Byte
00
00
FF
ADC100DS REV. E MAR 00

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