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ADC0841BCV Schematic ( PDF Datasheet ) - National Semiconductor

Teilenummer ADC0841BCV
Beschreibung 8-Bit P Compatible A/D Converter
Hersteller National Semiconductor
Logo National Semiconductor Logo 




Gesamt 16 Seiten
ADC0841BCV Datasheet, Funktion
May 1998
ADC0841
8-Bit µP Compatible A/D Converter
General Description
The ADC0841 is a CMOS 8-bit successive approximation
A/D converter. Differential inputs provide low frequency input
common mode rejection and allow offsetting the analog
range of the converter. In addition, the reference input can
be adjusted enabling the conversion of reduced analog
ranges with 8-bit resolution.
The A/D is designed to operate with the control bus of a va-
riety of microprocessors. TRI-STATE® output latches that di-
rectly drive the data bus permit the A/D to be configured as
a memory location or I/O device to the microprocessor with
no interface logic necessary.
Features
n Easy interface to all microprocessors
n Operates ratiometrically or with 5 VDC voltage reference
n No zero or full-scale adjust required
n Internal clock
n 0V to 5V input range with single 5V power supply
n 0.3" standard width 20-pin package
n 20 Pin Molded Chip Carrier Package
Key Specifications
n Resolution: 8 Bits
n Total Unadjusted Error: ±12 LSB and ± 1 LSB
n Single Supply: 5 VDC
n Low Power: 15 mW
n Conversion Time: 40 µs
Block and Connection Diagrams
Dual-In-Line Package (N)
DS008557-1
Molded Chip Carrier Package (V)
(N.C.-No Connection)
DS008557-2
Top View
TRI-STATE® is a registered trademark of National Semiconductor Corporation.
NSC800is a trademark of National Semiconductor Corporation.
© 1999 National Semiconductor Corporation DS008557
Top View
DS008557-3
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ADC0841BCV Datasheet, Funktion
Functional Block Diagram
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DS008557-10
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ADC0841BCV pdf, datenblatt
Applications Information (Continued)
I/O Interface to NSC800
0010
000F
001F
3C00
0000'
0001'
0003'
0005'
0008'
000B'
000D'
000E'
0010'
0011'
0014'
0016'
0017'
00
0E 1F
06 16
21 0000'
11 003C
ED A3
EB
3E 0F
3D
C2 0013'
ED A2
EB
C2 000E'
DS008557-21
SAMPLE PROGRAM FOR ADC0841 — NSC800 INTERFACE
NCONV
DEL
CS
ADDTA
DTA:
START:
STCONV:
WAIT:
EQU
EQU
EQU
EQU
DB
LD
LD
LD
LD
OUTI
EX
LD
DEC
JP
INI
EX
JP
16
15
1FH
003CH
08H
C,CS
B,NCONV
HL,DTA
DE,ADDTA
DE,HL
A,DEL
A
NZ,WAIT
DE,HL
NZ,STCONV
;TWICE THE NUMBER OF REQUIRED
;CONVERSIONS
;DELAY 60 µsec CONVERSION
;THE BOARD ADDRESS
;START OF RAM FOR A/D
;DATA
;DATA
;START A CONVERSION
;HL=RAM ADDRESS FOR THE
;A/D DATA
;WAIT 60 µsec FOR THE
;CONVERSION TO FINISH
;STORE THE A/D’S DATA
;THE REQUIRED CONVERSIONS
COMPLETED?
;IF NOT GOTO STCONV
END
Note 12: A conversion is started, then a 60 µs wait for the A/D to complete a conversion and the data is stored at address ADDTA for the first conversion,
ADDTA + 1 for the second conversion, etc. for a total of 8 conversions.
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