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PDF ADC0838 Data sheet ( Hoja de datos )
| Número de pieza | ADC0838 | |
| Descripción | Serial I/O 8-Bit A/D Converters with Multiplexer Options | |
| Fabricantes | Micro Linear Corporation | |
| Logotipo |  |
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May 1997
ML2281, ML2282*,
ML2284#, ML2288#
Serial I/O 8-Bit A/D Converters with
Multiplexer Options
GENERAL DESCRIPTION
The ML2281 family are 8-bit successive approximation
A/D converters with serial I/O and configurable input
multiplexers with up to 8 input channels.
All errors of the sample-and-hold, incorporated on the
ML2281 family are accounted for in the analog-to-digital
converters accuracy specification.
The voltage reference can be externally set to any value
between GND and VCC, thus allowing a full conversion
over a relatively small voltage span if desired.
The ML2281 family is an enhanced double polysilicon
CMOS pin compatible second source for the ADC0831,
ADC0832, ADC0834, and ADC0838 A/D converters. The
ML2281 series enhancements are faster conversion time,
true sample-and-hold function, superior power supply
rejection, improved AC common mode rejection, faster
digital timing, and lower power dissipation. All parameters
are guaranteed over temperature with a power supply
voltage of 5V ±10%.
BLOCK DIAGRAM
ML2281
CONTROL
AND
TIMING
CS
CLK
OUTPUT
SHIFT-REGISTER
DO
FEATURES
s Conversion time: 6µs
s Total unadjusted error: ±1/2LSB or ±1LSB
s Sample-and-hold: 375ns acquisition
s 2, 4 or 8-input multiplexer options
s 0 to 5V analog input range with single 5V
power supply
s Operates ratiometrically or with up to 5V
voltage reference
s No zero or full-scale adjust required
s ML2281 capable of digitizing a 5V, 40kHz sine wave
s Low power: 12.5mW MAX
s Superior pin compatible replacement for ADC0831,
ADC0832, ADC0834, and ADC0838
s Analog input protection: 25mA (min) per input
s Now in 8-Pin SOIC Package (ML2281, ML2282)
(* Indicates Part is Obsolete)
(# Indicates Part is End Of Life as Of July 1, 2000)
ML2288 (8-Channel SE or 4-Channel Diff Multiplexer)
ML2284 (4-Channel SE or 2-Channel Diff Multiplexer)
ML2284 (2-Channel SE or 1-Channel Diff Multiplexer)
4-BIT
INPUT
SHIFT-REGISTER
CONTROL
AND
TIMING
DI
SARS
CLK
CS
VIN+
A/D WITH SAMPLE & HOLD FUNCTION
+Σ
–
8pF
+
COMP
–
SUCCESSIVE
APPROXIMATION
REGISTER
VIN–
8pF
D/A
CONVERTER
VREF
VCC GND
CH0
CH1
CH2
CH3
CH4
CH5
CH6
CH7
COMMON
OUTPUT
SHIFT-REGISTER
DO
SE
A/D
CONVERTER
WITH
SAMPLE & HOLD
FUNCTION
DGND
SHUNT
REGULATOR
AGND VREF
VCC V+
1
1 page  
ML2281, ML2282, ML2284, ML2288
ELECTRICAL CHARACTERISTICS (Continued)
SYMBOL PARAMETER
CONDITIONS
ML228XB
TYP
MIN NOTE 3
CONVERTER AND MULTIPLEXER CHARACTERISTICS (CONTINUED)
IOFF Off Channel
On channel = VCC
Leakage Current Off channel = 0V
(Notes 4, 9)
–1
On channel = 0V
Off channel = VCC
(Notes 4, 9)
ION On Channel
On channel = 0V
Leakage Current Off channel = VCC
(Notes 4, 9)
–1
On channel = VCC
Off channel = 0V
(Notes 4, 9)
DIGITAL AND DC CHARACTERISTICS
VIN(1)
Logical “1”
Input Voltage
(Note 4)
2.0
VIN(0)
Logical “0”
Input Voltage
(Note 4)
IIN(1)
Logical “1” Input
Current
VIN = VCC (Note 4)
IIN(0)
Logical “0” Input VIN = 0V (Note 4)
Current
–1
VOUT(1) Logical “1”
Output Voltage
IOUT = –2mA (Note 4)
4.0
VOUT(0) Logical “0”
Output Voltage
IOUT = 2mA (Note 4)
IOUT
ISOURCE
HI-Z Output
Current
Output Source
Current
VOUT = 0V (Note 4)
VOUT = VCC
VOUT = 0V (Note 4)
–1
–6.5
ISINK
ICC
Output Sink Current VOUT = VCC (Note 4)
Supply Current
ML2281, ML2284
ML2288 (Note 4)
1.3
ML2282 Includes ladder
Current (Note 4)
1.8
MAX
+1
+1
0.8
1
0.4
1
8.0
2.5
3.5
ML228XC
TYP
MIN NOTE 3 MAX
–1
+1
–1
+1
2.0
–1
4.0
–1
–6.5
1.3
1.8
0.8
1
0.4
1
8.0
2.5
3.5
UNITS
µA
µA
µA
µA
V
V
µA
µA
V
V
µA
µA
mA
mA
mA
mA
5
5 Page 
ML2281, ML2282, ML2284, ML2288
17
DI*
CS 18
R
START
RR R
5-BIT SHIFT-REGISTER
ODD/
SGL/DIF SIGN SELECT 1
RD
SELECT 0 C
16
CLK
VCC
MUX
ADDRESS NOTE 1
NOTE 1
1
CH0*
2
CH1*
3
CH2
4
CH3
5
CH4*
6
CH5*
7
CH6*
8
CH7*
9
COM*
12
VREF
VCC 20
V+*
DGND*
AGND*
+Σ
–
ANALOG
MUX
(EQUIVALENT)
C
+
–
COMP
CR
7V SHUNT
REGULATOR
TO INTERNAL
CIRCUITRY
R
INPUT
13
VCC
16 TO
17 INTERNAL
18 CIRCUITS
LADDER
AND
DECODER
INPUT PROTECTION—ALL LOGIC INPUTS
SAR
LOGIC
AND
LATCH
COMP
CS
START
TD
TIME
DELAY
DSTART 2
13
SE*
CS
SARS*
15
CS
CR
QD
DQ
CR
CS
D Q DEOC
DSTART 1
CR
CS
CS
CS
C
CS R Q
B7
EOC
RC
D
B6
B5
B4
9-BIT
SHIFT
B3 REGISTER
B2
B1
B0
EOC
14
DO
LSB FIRST
MSB FIRST
PARALLEL XFR
TO SHIFT REGISTER
*SOME OF THESE FUNCTIONS/PINS ARE NOT AVAILABLE WITH OTHER OPTIONS.
NOTE 1: FOR THE ML2284 DI IS INPUT DIRECTLY TO THE D INPUT OF SELECT 1. SELECT 0 IS FORCED TO A “1”. FOR THE ML2282, DI IS INPUT DIRECTLY TO THE D
INPUT OF ODD/SIGN. SELECT 0 IS FORCED TO A “1” AND SELECT 1 IS FORCED TO A “0”.
Figure 6. ML2288 Functional Block Diagram
11
11 Page | ||
| Páginas | Total 26 Páginas | |
| PDF Descargar | [ Datasheet ADC0838.PDF ] | |
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