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ADC0834CCN Schematic ( PDF Datasheet ) - National Semiconductor

Teilenummer ADC0834CCN
Beschreibung 8-Bit Serial I/O A/D Converters with Multiplexer Options
Hersteller National Semiconductor
Logo National Semiconductor Logo 




Gesamt 30 Seiten
ADC0834CCN Datasheet, Funktion
August 1999
ADC0831/ADC0832/ADC0834/ADC0838
8-Bit Serial I/O A/D Converters with Multiplexer Options
General Description
The ADC0831 series are 8-bit successive approximation A/D
converters with a serial I/O and configurable input multiplex-
ers with up to 8 channels. The serial I/O is configured to
comply with the NSC MICROWIREserial data exchange
standard for easy interface to the COPSfamily of proces-
sors, and can interface with standard shift registers or µPs.
The 2-, 4- or 8-channel multiplexers are software configured
for single-ended or differential inputs as well as channel as-
signment.
The differential analog voltage input allows increasing the
common-mode rejection and offsetting the analog zero input
voltage value. In addition, the voltage reference input can be
adjusted to allow encoding any smaller analog voltage span
to the full 8 bits of resolution.
Features
n NSC MICROWIRE compatible — direct interface to
COPS family processors
n Easy interface to all microprocessors, or operates
“stand-alone”
n Operates ratiometrically or with 5 VDC voltage
reference
n No zero or full-scale adjust required
n 2-, 4- or 8-channel multiplexer options with address logic
n Shunt regulator allows operation with high voltage
supplies
n 0V to 5V input range with single 5V power supply
n Remote operation with serial digital data link
n TTL/MOS input/output compatible
n 0.3" standard width, 8-, 14- or 20-pin DIP package
n 20 Pin Molded Chip Carrier Package (ADC0838 only)
n Surface-Mount Package
Key Specifications
n Resolution
n Total Unadjusted Error
n Single Supply
n Low Power
n Conversion Time
8 Bits
±12 LSB and ±1 LSB
5 VDC
15 mW
32 µs
Typical Application
TRI-STATE® is a registered trademark of National Semiconductor Corporation.
COPSand MICROWIREare trademarks of National Semiconductor Corporation.
© 1999 National Semiconductor Corporation DS005583
DS005583-1
www.national.com






ADC0834CCN Datasheet, Funktion
AC Characteristics (Continued)
The following specifications apply for VCC = 5V, tr = tf = 20 ns and 25˚C unless otherwise specified.
Typ Tested
Parameter
Conditions
(Note 12)
Limit
(Note 13)
tpd1, tpd0 — CLK Falling
Edge to Output Data Valid
CL=100 pF
Data MSB First
650
(Note 11)
Data LSB First
250
t1H, t0H, — Rising Edge of
CS to Data Output and
CL=10 pF, RL=10k
(see TRI-STATE® Test Circuits)
125
SARS Hi–Z
CIN, Capacitance of Logic
Input
CL=100 pf, RL=2k
500
5
COUT, Capacitance of Logic
Outputs
5
Design
Limit
(Note 14)
1500
600
250
Limit
Units
ns
ns
ns
ns
pF
pF
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. DC and AC electrical specifications do not apply when operating
the device beyond its specified operating conditions.
Note 2: All voltages are measured with respect to the ground plugs.
Note 3: Internal zener diodes (6.3 to 8.5V) are connected from V+ to GND and VCC to GND. The zener at V+ can operate as a shunt regulator and is connected
to VCC via a conventional diode. Since the zener voltage equals the A/D’s breakdown voltage, the diode insures that VCC will be below breakdown when the device
is powered from V+. Functionality is therefore guaranteed for V+ operation even though the resultant voltage at VCC may exceed the specified Absolute Max of 6.5V.
It is recommended that a resistor be used to limit the max current into V+. (See Figure 3 in Functional Description Section 6.0)
Note 4: When the input voltage (VIN) at any pin exceeds the power supply rails (VIN < Vor VIN > V+) the absolute value of current at that pin should be limited
to 5 mA or less. The 20 mA package input current limits the number of pins that can exceed the power supply boundaries with a 5 mA current limit to four.
Note 5: Human body model, 100 pF discharged through a 1.5 kresistor.
Note 6: Total unadjusted error includes offset, full-scale, linearity, and multiplexer errors.
Note 7: Cannot be tested for ADC0832.
Note 8: For VIN(−)VIN(+) the digital output code will be 0000 0000. Two on-chip diodes are tied to each analog input (see Block Diagram) which will forward conduct
for analog input voltages one diode drop below ground or one diode drop greater than the VCC supply. Be careful, during testing at low VCC levels (4.5V), as high
level analog inputs (5V) can cause this input diode to conduct — especially at elevated temperatures, and cause errors for analog inputs near full-scale. The spec
allows 50 mV forward bias of either diode. This means that as long as the analog VIN or VREF does not exceed the supply voltage by more than 50 mV, the output
code will be correct. To achieve an absolute 0 VDC to 5 VDC input voltage range will therefore require a minimum supply voltage of 4.950 VDC over temperature varia-
tions, initial tolerance and loading.
Note 9: Leakage current is measured with the clock not switching.
Note 10: A 40% to 60% clock duty cycle range insures proper operation at all clock frequencies. In the case that an available clock has a duty cycle outside of these
limits, the minimum, time the clock is high or the minimum time the clock is low must be at least 1 µs. The maximum time the clock can be high is 60 µs. The clock
can be stopped when low so long as the analog input voltage remains stable.
Note 11: Since data, MSB first, is the output of the comparator used in the successive approximation loop, an additional delay is built in (see Block Diagram) to allow
for comparator response time.
Note 12: Typicals are at 25˚C and represent most likely parametric norm.
Note 13: Tested limits are guaranteed to National’s AOQL (Average Outgoing Quality Level).
Note 14: Guaranteed but not 100% production tested. These limits are not used to calculate outgoing quality levels.
Typical Performance Characteristics
Unadjusted Offset Error
vs VREF Voltage
Linearity Error vs VREF
Voltage
Linearity Error vs
Temperature
www.national.com
DS005583-43
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ADC0834CCN pdf, datenblatt
Functional Description
1.0 MULTIPLEXER ADDRESSING
The design of these converters utilizes a sample-data com-
parator structure which provides for a differential analog in-
put to be converted by a successive approximation routine.
The actual voltage converted is always the difference be-
tween an assigned “+” input terminal and a “−” input terminal.
The polarity of each input terminal of the pair being con-
verted indicates which line the converter expects to be the
most positive. If the assigned “+” input is less than the “−” in-
put the converter responds with an all zeros output code.
A unique input multiplexing scheme has been utilized to pro-
vide multiple analog channels with software-configurable
single-ended, differential, or a new pseudo-differential option
which will convert the difference between the voltage at any
analog input and a common terminal. The analog signal con-
ditioning required in transducer-based data acquisition sys-
tems is significantly simplified with this type of input flexibility.
One converter package can now handle ground referenced
inputs and true differential inputs as well as signals with
some arbitrary reference voltage.
A particular input configuration is assigned during the MUX
addressing sequence, prior to the start of a conversion. The
MUX address selects which of the analog inputs are to be
enabled and whether this input is single-ended or differential.
In the differential case, it also assigns the polarity of the
channels. Differential inputs are restricted to adjacent chan-
nel pairs. For example channel 0 and channel 1 may be se-
lected as a different pair but channel 0 or 1 cannot act differ-
entially with any other channel. In addition to selecting
differential mode the sign may also be selected. Channel 0
may be selected as the positive input and channel 1 as the
negative input or vice versa. This programmability is best il-
lustrated by the MUX addressing codes shown in the follow-
ing tables for the various product options.
The MUX address is shifted into the converter via the DI line.
Because the ADC0831 contains only one differential input
channel with a fixed polarity assignment, it does not require
addressing.
The common input line on the ADC0838 can be used as a
pseudo-differential input. In this mode, the voltage on this pin
is treated as the “−” input for any of the other input channels.
This voltage does not have to be analog ground; it can be
any reference potential which is common to all of the inputs.
This feature is most useful in single-supply application where
the analog circuitry may be biased up to a potential other
than ground and the output signals are all referred to this
potential.
Part
Number
ADC0831
ADC0832
ADC0834
ADC0838
TABLE 1. Multiplexer/Package Options
Number of Analog Channels
Single-Ended
Differential
11
21
42
84
Number of
Package Pins
8
8
14
20
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