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PDF AD9875 Data sheet ( Hoja de datos )

Número de pieza AD9875
Descripción Broadband Modem Mixed-Signal Front End
Fabricantes Analog Devices 
Logotipo Analog Devices Logotipo



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Aa
Broadband Modem
Mixed-Signal Front End
AD9875
FEATURES
Low Cost 3.3 V-CMOS Mixed-Signal Front End (MxFE™)
Converter for Broadband Modems
10-/12-Bit D/A Converter (TxDAC+®)
64/32 MSPS Input Word Rate
2؋/4؋ Interpolating LPF or BPF Transmit Filter
128 MSPS DAC Output Update Rate
Wide (26 MHz) Transmit Bandwidth
Power-Down Mode
10-/12-Bit, 50 MSPS A/D Converter
Fourth Order Low-Pass Filter 12 MHz or 26 MHz
with Bypass
–6 dB to +36 dB Programmable Gain Amplifier
Internal Clock Multiplier (PLL)
Clock Outputs
Voltage Regulator Controller
48-Lead LQFP Package
APPLICATIONS
Powerline Networking
Home Phone Networking
xDSL
Broadband Wireless
Home RF
PWR DN
Tx QUIET
GAIN
Tx [5:0]
Tx SYNC
FUNCTIONAL BLOCK DIAGRAM
AD9875
Tx
10 10
Kx INTERPOLATION
MUX
LPF/BPF
TxDAC+
Tx+
Tx–
CLK-A
CLK-B
Rx SYNC
PLL-A
؋L
CLOCK GEN
PLL-B
؋ M/N
VREF
VRC
GATE
FB
OSCIN
XTAL
Rx [5:0]
Rx
MUX 10
ADC
PGA
Rx+
LPF PGA
Rx–
SPORT 3
REGISTER
CONTROL
PRODUCT DESCRIPTION
The AD9875 is a single-supply broadband modem mixed-
signal front end (MxFE) IC. The devices contain a transmit
path Interpolation Filter and DAC, and a receive path PGA,
LPF, and ADC supporting a variety of broadband modem
applications. Also on chip is a PLL clock multiplier that pro-
vides all required clocks from a single crystal or clock input.
The AD9875 provides 10-bit converter performance on both
the Tx and Rx paths.
The TxDAC+ uses a selectable digital 2× or 4× interpolation
low-pass or band-pass filter to further oversample transmit
data and reduce the complexity of analog reconstruction filtering.
The transmit path signal bandwidth can be as high as 26 MHz
at an input data rate of 64 MSPS. The 10-bit DAC provides
differential current outputs for optimum noise and distortion
performance. The DAC full-scale current can be adjusted
from 2 mA to 20 mA by a single resistor, providing 20 dB of
additional gain range.
The receive path consists of a PGA, LPF, and ADC. The two-stage
PGA has a gain range of –6 dB to +36 dB, and is programmable
in 2 dB steps, adding 42 dB of dynamic range to the receive path.
The receive path LPF cutoff frequency can be programmed to either
12 MHz or 26 MHz. The filter cutoff frequency can also be tuned
or bypassed where filter requirements differ. The 10-bit ADC
uses a multistage differential pipeline architecture to achieve
excellent dynamic performance with low power consumption.
The AD9875 provides a voltage regulator controller (VRC) that
can be used with an external power MOSFET transistor to form
a cost-effective 1.3 V linear regulator.
The digital transmit and receive ports are each multiplexed to a
bus width of 5/6 bits and are clocked at a frequency of twice the
10-bit word rate.
The AD9875 ADC and/or DAC can also be used at higher
sampling rates as high as 64 MSPS in a 5-bit resolution non-
multiplexed mode.
The AD9875 is pin compatible with the 12-bit AD9876. Both are
available in a space-saving 48-lead LQFP package. They are specified
over the industrial (–40°C to +85°C) temperature range.
MxFE is a trademark of Analog Devices, Inc.
TxDAC+ is a registered trademark of Analog Devices, Inc.
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2002

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AD9875 pdf
AD9875
ABSOLUTE MAXIMUM RATINGS*
Power Supply (VS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.9 V
Digital Output Current . . . . . . . . . . . . . . . . . . . . . . . . . 5 mA
Digital Inputs . . . . . . . . . . . . . . . . . –0.3 V to DRVDD 0.3 V
Analog Inputs . . . . . . . . . . . . . . . . . . –0.3 V to AVDD 0.3 V
Operating Temperature . . . . . . . . . . . . . . . . . –40°C to +85°C
Maximum Junction Temperature . . . . . . . . . . . . . . . . 150°C
Storage Temperature . . . . . . . . . . . . . . . . . . –65°C to +150°C
Lead Temperature (Soldering 10 sec) . . . . . . . . . . . . . 300°C
*Stresses greater than those listed under Absolute Maximum Ratings may cause
permanent damage to the device. This is a stress rating only; functional operation
of the device at these or any other conditions above those indicated in the
operational section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
EXPLANATION OF TEST LEVELS
I – Devices are 100% production tested at 25°C and guaranteed
by design and characterization testing for industrial operating
temperature range (–40°C to +85°C).
II – Parameter is guaranteed by design and/or characterization
testing.
III – Parameter is a typical value only.
THERMAL CHARACTERISTICS
Thermal Resistance
48-Lead LQFP
JA = 57°C/W
JC = 28°C/W
Model
AD9875BST
AD9875-EB
AD9875BSTRL
ORDERING GUIDE
Temperature Range
Package Description
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
48-Lead LQFP
Evaluation Board
BST Reel
Package Option
ST-48
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the AD9875 features proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
REV. A
–5–

5 Page





AD9875 arduino
AD9875
Typical AC Characterization Curves for Rx Path
40
38
36
34
32
30
28
26
24
22
20
64 80 96 112 128 144 160 176 192
TPC 17. Rx vs. Tuning Target, fADC = 32 MHz, LPF with
Wideband Rx LPF = 1
18
17
16
15
14
13
12
11
10
9
8
48 64 80 96 112 128 144 160 176 192
TPC 19. fC vs. Tuning Target, fADC = 32 MHz, LPF with
Wideband Rx LPF = 0
0.60
0.40
0.20
0.00
–0.20
–0.40
–0.60
–0.80
–6 –4 –2 0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36
VGA GAIN – dB
TPC 18. PGA Gain Error vs. Gain
2.5
2.4
2.3
2.2
2.1
2.0
1.9
1.8
1.7
1.6
1.5
–6 –4 –2 0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36
VGA GAIN – dB
TPC 20. PGA Gain Step Size vs. Gain
REV. A
–11–

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