Datenblatt-pdf.com


A62S6316V-55SI Schematic ( PDF Datasheet ) - AMIC Technology

Teilenummer A62S6316V-55SI
Beschreibung 64K X 16 BIT LOW VOLTAGE CMOS SRAM
Hersteller AMIC Technology
Logo AMIC Technology Logo 




Gesamt 15 Seiten
A62S6316V-55SI Datasheet, Funktion
www.DataSheet4U.com
Preliminary
A62S6316 Series
64K X 16 BIT LOW VOLTAGE CMOS SRAM
Document Title
64K X 16 BIT LOW VOLTAGE CMOS SRAM
Revision History
Rev. No.
0.0
0.1
0.2
0.3
0.4
0.5
History
Initial issue
Change access times from 70/100 ns to 55/70 ns(max.)
Change dynamic operating current from 80/70mA to 40mA
Modify TSOP 44L (Type II) package outline drawing
Modify truth table
Change dynamic operating current from 40mA to 50mA(max.)
Modify TSOP 44L (Type II) package outline drawing and
Dimensions
Add mini BGA package outline dimensions symbol E2 min.
and max.
Issue Date
October 8, 1998
February 12, 1999
June 9, 1999
June 21, 1999
November 9, 1999
August 12, 2002
Remark
Preliminary
PRELIMINARY (August, 2002, Version 0.5)
AMIC Technology, Inc.






A62S6316V-55SI Datasheet, Funktion
www.DataSheet4U.com
Truth Table
A62S6316 Series
CE
OE
WE
LB
HB
I/O0 to I/O7 Mode
I/O8 to I/O15 Mode
VCC Current
H X X X X Not selected
Not selected
ISB1, ISB
L L Read
Read
ICC1, ICC2, ICC
L L H L H Read
High - Z
ICC1, ICC2, ICC
H L High - Z
Read
ICC1, ICC2, ICC
L L Write
Write
ICC1, ICC2, ICC
L X L L H Write
Not Write/Hi - Z
ICC1, ICC2, ICC
H L Not Write/Hi - Z Write
ICC1, ICC2, ICC
L X High - Z
L HH
X L High - Z
High - Z
High - Z
ICC1, ICC2, ICC
ICC1, ICC2, ICC
X X X H H Not selected
Not selected
ISB1, ISB
Note: X = H or L
Capacitance (TA = 25°C, f = 1.0MHz)
Symbol
Parameter
Min.
Max.
Unit
Conditions
CIN* Input Capacitance
- 6 pF VIN = 0V
CI/O*
Input/Output Capacitance
-
8 pF
VI/O = 0V
* These parameters are sampled and not 100% tested.
PRELIMINARY (August, 2002, Version 0.5)
5
AMIC Technology, Inc.

6 Page









A62S6316V-55SI pdf, datenblatt
www.DataSheet4U.com
AC Test Conditions
Input Pulse Levels
Input Rise And Fall Time
Input and Output Timing Reference Levels
Output Load
0V to 2.4V
5 ns
1.5V
See Figures 1 and 2
A62S6316 Series
TTL TTL
CL
30pF
CL
5pF
* Including scope and jig.
* Including scope and jig.
Figure 1. Output Load
Figure 2. Output Load for tCLZ, tOLZ,
tCHZ, tOHZ, tWHZ, and tOW
Data Retention Characteristics (TA = 0°C to 70°C or -25°C to 85°C)
Symbol
Parameter
Min.
Max. Unit
Conditions
VDR VCC for Data Retention
2.0 3.3 V CE VCC - 0.2V
ICCDR
Data Retention Current
S-Version
SI-Version
- 10*
- 20**
tCDR Chip Disable to Data Retention Time
0-
tR Operation Recovery Time
tVR VCC Rise Time from Data Retention
Voltage to Operating Voltage
TRC -
5-
* A62S6316-55S/70S
** A62S6316-55SI/70SI
ICCDR: max. 3µA at TA = 0°C to + 40°C
ICCDR: max. 3µA at TA = 0°C to + 40°C
VCC = 2.0V,
µA CE VCC - 0.2V
VIN 0V
ns
ns See Retention Waveform
ms
PRELIMINARY (August, 2002, Version 0.5)
11
AMIC Technology, Inc.

12 Page





SeitenGesamt 15 Seiten
PDF Download[ A62S6316V-55SI Schematic.PDF ]

Link teilen




Besondere Datenblatt

TeilenummerBeschreibungHersteller
A62S6316V-55S64K X 16 BIT LOW VOLTAGE CMOS SRAMAMIC Technology
AMIC Technology
A62S6316V-55SI64K X 16 BIT LOW VOLTAGE CMOS SRAMAMIC Technology
AMIC Technology

TeilenummerBeschreibungHersteller
CD40175BC

Hex D-Type Flip-Flop / Quad D-Type Flip-Flop.

Fairchild Semiconductor
Fairchild Semiconductor
KTD1146

EPITAXIAL PLANAR NPN TRANSISTOR.

KEC
KEC


www.Datenblatt-PDF.com       |      2020       |      Kontakt     |      Suche