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PDF A62S6308 Data sheet ( Hoja de datos )
| Número de pieza | A62S6308 | |
| Descripción | 64K X 8 BIT LOW VOLTAGE CMOS SRAM | |
| Fabricantes | AMIC Technology | |
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A62S6308 Series
64K X 8 BIT LOW VOLTAGE CMOS SRAM
Document Title
64K X 8 BIT LOW VOLTAGE CMOS SRAM
Revision History
Rev. No.
1.0
1.1
1.2
1.3
2.0
History
Initial issue
Modify TSOP (TSSOP) pin configuration.
Modify SOP 32L, TSOP 32L and TSSOP 32L type
packages outline dimensions.
Change TSSOP 32L type package to sTSOP 32L.
Modify sTSOP 32L type package LE symbol dimensions.
Modify 32-pin TSOP package L symbol dimensions.
Finalize
Add 36-ball Mini BGA (6X8) package
Issue Date
September 01, 1997
January 16, 1998
Remark
Preliminary
June 16, 1998
June 22, 1998
October 9, 1998
Final
(October, 1998, Version 2.0)
AMIC Technology, Inc.
1 page  
A62S6308 Series
DC Electrical Characteristics (continued)
Symbol
Parameter
A62S6308-70S/10S
Min.
Max.
A62S6308-70SI/10SI
Min.
Max.
Unit
Conditions
ISB - 0.5 - 0.5 mA CE1 = VIH or
CE2 = VIL
ISB1 Standby Power
Supply Current
CE1 ≥ VCC - 0.2V
- 15 - 30 µA CE2 ≥ VCC - 0.2V
VIN ≥ 0V
ISB2
- 15
-
30
µA
CE2 ≤ 0.2V
VIN ≥ 0V
VOL Output Low Voltage
-
0.4
-
0.4 V IOL = 2.1mA
VOH Output High Voltage
2.4
-
2.4
- V IOH = -1.0mA
Truth Table
Mode
Standby
Output Disable
Read
Write
Note: X = H or L
CE1 CE2
HX
XL
LH
LH
LH
OE
X
X
H
L
X
WE
X
X
H
H
L
I/O Operation
High Z
High Z
High Z
DOUT
DIN
Supply Current
ISB, ISB1
ISB, ISB2
ICC, ICC1, ICC2
ICC, ICC1, ICC2
ICC, ICC1, ICC2
Capacitance (TA = 25°C, f = 1.0MHz)
Symbol
Parameter
Min.
CIN* Input Capacitance
CI/O*
Input/Output Capacitance
* These parameters are sampled and not 100% tested.
Max.
6
8
Unit
pF
pF
Conditions
VIN = 0V
VI/O = 0V
(October, 1998, Version 2.0)
4 AMIC Technology, Inc.
5 Page 
AC Test Conditions
Input Pulse Levels
Input Rise and Fall Time
Input and Output Timing Reference Levels
Output Load
0.4V to 2.4V
5 ns
1.5V
See Figures 1 and 2
A62S6308 Series
TTL TTL
CL
30pF
CL
5pF
* Including scope and jig.
* Including scope and jig.
Figure 1. Output Load
Figure 2. Output Load for tCLZ1,
tCLZ2, tOHZ, tOLZ, tCHZ1,
tCHZ2, tWHZ, and tOW
Data Retention Characteristics (TA = 0°C to + 70°C or -25°C to 85°C)
Symbol
VDR1
Parameter
Min.
2.0
Max.
3.6
Unit Conditions
V CE1 ≥ VCC - 0.2V
VDR2
VCC for Data Retention
2.0 3.6
CE2 ≤ 0.2V
V CE1 ≥ VCC - 0.2V or
CE1 ≤ 0.2V
ICCDR1
Data Retention Current
S-Version
SI-Version
- 10*
- 20**
ICCDR2
S-Version
SI-Version
- 10*
- 20**
tCDR Chip Disable to Data Retention Time
0
tR Operation Recovery Time
tRC
tVR
VCC Rise Time from Data Retention Voltage
to Operating Voltage
5
** A62S6308-70S/10S
* A62S6308-70SI/10SI
ICCDR: Max. 3µA at TA = 0°C + 40°C
ICCDR: Max. 3µA at TA = 0°C + 40°C
-
-
-
VCC = 2.0V
µA CE1 ≥ VCC - 0.2V
CE2 ≥ VCC - 0.2V
VIN ≥ 0V
VCC = 2.0V
µA CE2 ≤ 0.2V
VIN ≥ 0V
ns
ns See Retention Waveform
ms
(October, 1998, Version 2.0)
10 AMIC Technology, Inc.
11 Page | ||
| Páginas | Total 17 Páginas | |
| PDF Descargar | [ Datasheet A62S6308.PDF ] | |
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