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PDF A3932 Data sheet ( Hoja de datos )

Número de pieza A3932
Descripción THREE PHASE POWER MOSFET CONTROLLER
Fabricantes Allegro MicroSystems 
Logotipo Allegro MicroSystems Logotipo



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No Preview Available ! A3932 Hoja de datos, Descripción, Manual

ADVANCED DATASHEET - 03/02/99
(Subject to change without notice)
3932
Page 1 of 8
THREE PHASE POWER
MOSFET CONTROLLER
GHC 5
CC 6
GLB 7
SB 8
GHB 9
CB 10
GLA 11
SA 12
GHA 13
A3932SEQ
29 SENSE
28 RC
27 PWM
26 TACH
25 SR
24 BRAKE
23 DIR
22 H2
21 H3
ABSOLUTE MAXIMUM RATINGS
at TA = +25°C
Load Supply Voltage, VBB ............................ 50 V
VREG (Transient) ......................................... 15 V
Logic Input Voltage Range,
VIN...................-0.3 V to VLCAP + 0.3 V
Sense Voltage, VSENSE ........................ -5 to 1.5 V
Pins SA/SB/SC, ................................... -5 to 50 V
Pins GHA/GHB/GHC ................-5 to VBB + 17 V
Pins CA/CB/CC .........................SA/SB/SC+17 V
Package Power Dissipation (TA = +25°C)
RØJA ..................................... 52.4 °C/W
RØJC ..................................... 22.7 °C/W
PD ................................................2.4 W
Operating Temperature Range,
TA ................................-20°C to +85°C
Junction Temperature, TJ ......................... +150°C
Storage Temperature Range,
TS...............................-55°C to +150°C
The A3932SEQ is a three-phase brushless DC motor controller. The
A3932’s high current gate drive capability allows driving of a wide range of
power MOSFETs and can support motor supply voltages from 12 to 50V.
The A3932 integrates a bootstrapped high side driver to minimize the
external component count required to drive N-channel MOSFET drivers.
Internal fixed off time PWM current control circuitry can be used to
regulate the maximum load current to a desired value. The peak load current
limit is set by the user’s selection of an input reference voltage and external
sensing resistor. The fixed off time pulse duration is set by a user-selected
external RC timing network. For added flexibility, the PWM input can be
used to provide speed/torque control, allowing the internal current control
circuit to set a maximum current limit.
The A3932 includes optional synchronous rectification. This feature
will short out the current path through the power MOSFETs intrinsic body
diodes during PWM off cycle current decay. This can minimize power
dissipation in the MOSFETs, eliminate the need for external power clamp
diodes, and potentially allow a more economical choice for the MOSFET
drivers.
The A3932 provides commutation logic for Hall sensors configured
for 120-degree spacing. The Hall input pins are pulled up to an internally
generated 5V reference. Power MOSFET protection features includes gate-
source voltage monitor, bootstrap capacitor charging current monitor,
undervoltage monitor, motor lead short to supply or ground, and thermal
shutdown.
FEATURES
n Drives Wide Range of N-channel
MOSFETs
n Sources 1.25A for Gate Turn-On
n Sinks 2.5A for Gate Turn-Off
n Synchronous Rectification
n Power MOSFET Protection
n Adjustable Dead Time for Cross
Conduction Protection
n Fast/Slow Current Decay Modes
n Internal PWM current Control
n PWM Torque Control Input
n Motor Lead Short to Supply
and Ground Protection
n Internal 5V Regulator
n Direction Control
n Brake Input
n Fault Diagnostic Output
n Tachometer Output
n Thermal Shutdown
n Undervoltage Protection
n 32L PLCC Package
Always order by complete part number: A3932SEQ

1 page




A3932 pdf
Page 5
3932
THREE-PHASE POWER MOSFET CONTROLLER
Pin Descriptions
RESET. A logic input that enables the device, internally
pulled up to LCAP. Logic HIGH will disable the device and
turn off MOSFETs, coasting the motor. Logic LOW will
enable gate drive to follow commutation logic. This input
will override BRAKE.
GLC/GLB/GLA. Low side gate drive outputs for external
MOSFET drivers. External series gate resistors can be used
to control slew rate seen at the power driver gate, thereby
controlling the di/dt and dv/dt of S outputs. The outputs will
source 1.25A for turn-on and sink 2.5A for gate discharge.
SC/SB/SA. Directly connected to the motor terminals,
these pins sense the voltages switched across the load. The
pin is also connected to the negative side of the bootstrap
capacitor and negative supply connection for the floating
high side drive.
GHC/GHB/GHA. High side gate drive outputs for n-
channel MOSFET drivers. External series gate resistors can
be used to control slew rate seen at the power driver gate,
thereby controlling the di/dt and dv/dt of S outputs. The
outputs will source 1.25A for turn-on and sink 2.5A for gate
discharge.
CC/CB/CA. High side connection for bootstrap capacitor,
positive supply for high side gate drive. The bootstrap
capacitor is charged to approximately VREG when the
output Sx terminal is low. When the output swings high, the
voltage on this pin rises with the output to provide the
boosted gate voltage needed for N-channel power
MOSFETs.
MODE. Logic input to set current decay method. Slow
decay mode (logic HIGH) switches off the high side FET in
response to PWM Off command. Fast decay mode (logic
LOW) switches off the source and sink MOSFET’s. Mode
pin is internally pulled up to LCAP.
H1/H2/H3. Hall sensor inputs, internally pulled up to
LCAP. Configured for 120-degree electrical spacing.
DIR. Logic input to reverse rotation, see commutation logic
table. Internally pulled up to LCAP.
FAULT. Open drain output to indicate fault condition. Will
go active high for any of the following fault conditions:
1) Invalid HALL input code.
2) High side gate-source undervoltage.
3) Bootstrap capacitor not sufficiently charged.
4) Undervoltage condition detected at VREG.
5) Thermal Shutdown.
6) Motor lead (SA/SB/SC) connected to ground.
Any fault will force a COAST condition, which turns all
power MOSFETs off. The fault state for gate-source and
bootstrap monitors is cleared at each commutation. If the
motor has stalled, the fault must be cleared by toggling the
RESET pin or repeating a power up sequence.
BRAKE. Logic input for braking function. Logic LOW will
turn on sink side MOSFETs, turn off the source side
MOSFETs. This will effectively short the BEMF in the
windings and brake the motor. Internally pulled up to logic
LCAP.
SR. Synchronous rectification input. Logic LOW disables
the feature forcing current decay through flyback diodes.
Logic HIGH will result in the opposite pair of drivers to
switch in response to a PWM “off” command. Internally
pulled up to LCAP.
TACH. Digital output to indicate speed of rotation. A 3µs
pulse appears at every Hall transition.
PWM. Speed control input. Logic HIGH will turn on
MOSFETs selected by Hall input logic. Logic LOW turns
off the selected MOSFETs. The PWM input held high to
utilize internal current control circuitry. Internally pulled up
to logic LCAP.
RC. Analog input. Connection for RT and CT to set the fixed
off time. The CT will also set the BLANK time. (see
applications information). It is recommended that the fixed
off time should not be less than 10µs. The resistor should be
in the range 10k to 500k.
SENSE. Analog input to the current limit comparator.
Voltage representing load current appears on this pin.
Voltage transients seen at this pin when the drivers turn on
are ignored for time Tblank.

5 Page










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