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A8904SLB Schematic ( PDF Datasheet ) - Allegro MicroSystems

Teilenummer A8904SLB
Beschreibung 3-PHASE BRUSHLESS DC MOTOR CONTROLLER/DRIVER WITH BACK-EMF SENSING
Hersteller Allegro MicroSystems
Logo Allegro MicroSystems Logo 




Gesamt 18 Seiten
A8904SLB Datasheet, Funktion
8904
3-PHASE BRUSHLESS DC MOTOR
CONTROLLER/DRIVER WITH BACK-EMF SENSING
A8904SLB (SOIC)
Absolute Maximum Ratings
The A8904SLB and A8904SLP are three-phase brushless dc motor
controller/drivers designed for applications where accurate control of high-
speed motors is required. The three half-bridge outputs are low on-resistance
n-channel DMOS devices capable of driving up to 1.2 A. The A8904 provides
complete, reliable, self-contained back-EMF sensing, motor startup and
running algorithms. A programmable digital frequency-locked loop speed
control circuit together with the linear current control circuitry provides
precise motor speed regulation.
A serial port allows the user to program various features and modes of
operation, such as the speed control parameters, startup current limit, sleep
mode, direction, and diagnostic modes.
The A8904 is fabricated in Allegro’s BCD (Bipolar CMOS DMOS)
process, an advanced mixed-signal technology that combines bipolar, analog
and digital CMOS, and DMOS power devices. The A8904SLB is provided in
a 24-lead wide-body SOIC batwing package. The A8904SLP is provided in a
thin (<1.2 mm), 28-lead SSOP package with an exposed thermal pad. Each
package type is available in a lead-free version (100% matte tin leadframe).
Load Supply Voltage, VBB . . . . . . . . . . . . 15 V
Output Current1, IOUT . . . . . . . . . . . . . . . . . . . . . ±1.4 A
Peak Output Current (Brake)2, IOUT(BRK) . ±3.0 A
Period2 for IOUT(BRK) to fall from
±3.0 A to ±1.4 A . . . . . . . . . . . . . . . 800 ms
Logic Supply Voltage, VDD . . . . . . . . . . . 7.0 V
Logic Input Voltage Range, VIN
(continuous) . . . . . . -0.3 V to VDD + 0.3 V
(tw <30 ns) . . . . . . . -1.0 V to VDD + 1.0 V
Package Power Dissipation, PD . . See Graph
Operating Temperature, TA . . . -20°C to +85°C
Junction Temperature3, TJ . . . . . . . . . +150°C
Storage Temperature,TS . . . . -55°C to +150°C
1Output current rating may be restricted to a value
determined by system concerns and factors. These
include: system duty cycle and timing, ambient
temperature, and use of any heatsinking and/or forced
cooling. For reliable operation, the specified maximum
junction temperature should not be exceeded.
2Peak output current is a transient condition that
occurs during braking when the motor acts as a
generator. The 3 A level is based on the maximum
peak of a sine wave that is damped. The maximum
period between the initial brake being applied and the
current through the drivers falling to 1.4 A should not
exceed 800 ms. See Braking section for more
information.
3Fault conditions that produce excessive junction
temperature will activate device thermal shutdown
circuitry. These conditions can be tolerated, but should
be avoided.
Features
„ Pin-for-pin replacement for A8902CLBA
„ Startup commutation circuitry
„ Sensorless commutation circuitry
„ Option of external sector data tachometer signal
„ Option of external speed control
„ Oscillator operation up to 20 MHz
„ Programmable overcurrent limit
„ Transconductance gain options: 500 mA/V or 250 mA/V
„ Programmable watchdog timer
„ Directional control
„ Serial Port Interface
„ TTL-compatible inputs
„ System diagnostics data out ported in real time
„ Dynamic braking through serial port or external terminal
Always order by complete part number:
Part Number Package
A8904SLB
24-pin batwing SOIC
A8904SLB-T 24-pin batwing SOIC; Lead-free
A8904SLP
28-pin SSOP with Exposed Thermal Pad
A8904SLP-T 24-pin SSOP with Exposed Thermal Pad; Lead-free






A8904SLB Datasheet, Funktion
8904
3-PHASE BRUSHLESS DC
MOTOR CONTROLLER/DRIVER
Serial Port Timing Conditions
CHIP SELECT
CLOCK
DATA
EA
CD
B
CD
Dwg. WP
A. Minimum CHIP SELECT setup time before CLOCK rising edge ......... 100 ns
B. Minimum CHIP SELECT hold time after CLOCK rising edge .............. 150 ns
C. Minimum DATA setup time before CLOCK rising edge ....................... 150 ns
D. Minimum DATA hold time after CLOCK rising edge ............................ 150 ns
E. Minimum CLOCK low time before CHIP SELECT .................................. 50 ns
F. Maximum CLOCK frequency .............................................................. 3.3 MHz
G. Minimum CHIP SELECT high time ...................................................... 500 ns
Note: the A8904 can be directly used in an existing A8902–A application, as the five most
significant bits are reset to zero, which is the default condition for A8902–A operation. The
only consideration when using the A8904 in an A8902-A application, is to ensure the
minimum CHIP SELECT high time is at least 500 ns.
115 Northeast Cutoff, Box 15036
6 Worcester, Massachusetts 01615-0036 (508) 853-5000

6 Page









A8904SLB pdf, datenblatt
8904
3-PHASE BRUSHLESS DC
MOTOR CONTROLLER/DRIVER
Functional Description (cont’d)
Speed and current control
Sector mode. An external tachometer signal, such as
sector or index pulses, can be used to create the TACH signal,
rather than the internally generated once-around scheme. The
external signal is applied to the SECTOR DATA terminal and
the serial port bit (D19 = 1) must be programmed to enable this
feature.
In applications where both internal and external TACH
signals are used, it is important to only switch between modes
when the SYNC signal on DATA OUT is low. This ensures the
speed control information that is being processed during the
transition, is not corrupted. SYNC is accessed through the
DATA OUT multiplexer, which is controlled by D22 & D23.
DATA OUT. The DATA OUT terminal is the output of a
2-bit input multiplexer controlled by D22 & D23 of the serial
port. Data available are TACH signal (internally or externally
generated), SYNC signal, FCOM signal, and thermal shutdown
(LOW = A8904 operating within thermal limits, HIGH =
thermal shutdown has occurred).
Speed loop initialization (YANK). To ensure rapid
transition from start-up to the normal operating condition, the
FILTER terminal is pulled up to the filter threshold voltage,
VFILTERTH, by the internal YANK command and the initial
output current will be set to the maximum selected current limit.
This condition is maintained until the motor reaches the correct
speed and the first ERROR FAST signal is produced which
removes the YANK and allows linear current control.
The YANK feature is also activated when an external speed
control scheme is used (D24 = 1). To ensure the YANK is
released at start-up by the internal speed control, it is important
to ensure the speed reference is set at a lower speed than what
the motor is designed to run at. Note that when the serial port is
programmed to run initially, the default condition for the speed
is set for the slowest condition so this will guarantee the YANK
to be released. It is important when using external speed control
that, as a minimum, the number of poles, speed control mode,
and speed reference are programmed in the serial port.
Forward/reverse. Directional control is managed
through D25 in the serial port.
Serial port. Control features and diagnostic data selection
are communicated to the A8904 through the 29-bit serial port.
See serial port timing diagrams on page 6. When CHIP SE-
LECT is low, data is written to the serial port on the positive
edge of the clock with the MSB (D28) fed in first. At the end of
115 Northeast Cutoff, Box 15036
12 Worcester, Massachusetts 01615-0036 (508) 853-5000

12 Page





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