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PDF A83516-12 Data sheet ( Hoja de datos )
| Número de pieza | A83516-12 | |
| Descripción | 8 Bit Microcontroller | |
| Fabricantes | AMIC Technology | |
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Preliminary
Document Title
8 Bit Microcontroller
Revision History
Rev. No. History
0.0 Initial issue
A83516 Series
8 Bit Microcontroller
Issue Date
Remark
November 25, 1998 Preliminary
PRELIMINARY (November, 1998, Version 0.0)
AMIC Technology, Inc.
1 page  
A83516 Series
Functional Description
The A83516 is a high speed 8-bit microcontroller. The architecture consists of a core controller, four general purposes I/O
ports, 256 bytes RAM internal register, 64K bytes ROM and a serial port.
This microcontroller supports 111 opcodes and executes instructions in 12 clock/machine cycle. It can reference both a
64K program address space and a 64K data storage space.
Timer/Counter 0, 1 and 2
Timer 0,1 and 2 each consist of two 8-bit data registers.
These are called TL0 and TH0 for Timer 0. TL1 and TH1
for Timer 1, and TL2 and TH2 for Timer 2. The TMOD
and TCON registers support control function for Timer 0
and Timer 1. The T2CON register provides control
function for Timer 2. When operating reload/capture
mode, RCAP2H and RCAP2L will be used.
N/C
EXTERNAL
OSCILLATOR
SIGNAL
XTAL 2
XTAL 1
VSS
Interrupt
The A83516 provides 6 interrupt modes. These consist
of 2 external interrupts, 3 internal interrupts and a serial
port interrupt.
The enable/disable interrupt is controlled by IE register in
SFR.
The priority of interrupts is controlled by IP register in
SFR.
Serial Port Transfer
The A83516 provides a full duplex serial transfer
function.
This function is controlled by SCON register in SFR.
And the data is storaged in SBUF register during
transmitting and receiving.
Oscillator Characteristics
The oscillator connections are shown as Figure 1. And
Figure 2. When quartz crystal is used, C1 and C2 are
30pF shown in Figure 1. When external clock is used,
the internal clock will be gotten through a divide-by-two
flip-flop. When starting up, the input loading for XTAL1
pin is 100pF. This is due to interaction between the
amplifier and its feedback capacitance interaction. After
the external signal meets the VIL and VIH specification
the capacitance will not exceed 20pF.
C2
XTAL 2
Figure 2. External Clock Drive configuration
Power Reduce Mode
IDLE Mode
It is executed by IDLE bit of PCON register in SFR. In
idle mode, the clock to microcontroller core is stopped.
The status in microcontroller core and I/O data are kept.
The microcontroller will stop idle status when either a
reset or an interrupt occurs.
POWER-DOWN Mode
It is executed by PD bit of PCON register in SFR. In
power-down mode, the oscillator clock will stop. The
data in RAM and status in SFR will be kept. The only
way to exit power-down mode is to reset this chip.
RESET
The external reset signal must be held high for at least
two machine cycles during the oscillator running.
After reset, the ports are held high, SP register to 07H,
all of the other SFR registers except SBUF to 00H, and
SBUF is not reset.
C1
XTAL 1
VSS
C1,C2 = 30pF ± 10pF for Crystals
Figure 1. Oscillator Connections
PRELIMINARY (November, 1998, Version 0.0)
4
AMIC Technology, Inc.
5 Page 
Package Information
P-DIP 40L Outline Dimensions
D
40
21
A83516 Series
unit: inches/mm
1 20
E
B
e1
B1
Base Plane
Seating Plane
θ 0º/15º
eA
Symbol
A
A1
A2
B
B1
C
D
E
E1
e1
L
eA
Dimensions in inches
Min Nom Max
- - 0.210
0.015
-
-
0.150 0.155 0.160
0.018 TYP
0.050 TYP
-
2.049
0.010
2.054
-
2.059
0.590 0.600 0.610
0.542 0.547 0.552
0.100 TYP
0.120 0.130 0.140
0.622 0.642 0.662
Dimensions in mm
Min Nom Max
- - 5.344
0.381
-
-
3.810 3.937 4.064
0.457 TYP
1.270 TYP
- 0.254 -
52.045 52.172 52.299
14.986 15.240 15.494
13.767 13.894 14.021
2.540 TYP
3.048 3.302 3.556
15.799 16.307 16.815
Notes:
1. The maximum value of dimension D includes end flash.
2. Dimension E1 does not include resin fins.
PRELIMINARY (November, 1998, Version 0.0)
10
AMIC Technology, Inc.
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet A83516-12.PDF ] | |
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