PDF A65H83181P-6 Data sheet ( Hoja de datos )

Número de pieza	A65H83181P-6
Descripción	128K x 36 & 256K x 18 Late Write Synchronous Fast SRAM with Pipelined Data Output
Fabricantes	AMIC Technology
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No Preview Available ! A65H73361/A65H83181 Series Preliminary 128K x 36 & 256K x 18 Late Write Synchronous Fast SRAM with Pipelined Data Output Document Title 128K x 36 & 256K x 18 Late Write Synchronous Fast SRAM with Pipelined Data Output Revision History Rev. No. History 2.0 Add JTAG standard Issue Date February 12, 1999 Remark Preliminary PRELIMINARY (February, 1999, Version 2.0) AMIC Technology, Inc. 1 page A65H73361/A65H83181 Series Clock Truth Table K LÕ H LÕ H LÕ H LÕ H LÕ H LÕ H LÕ H LÕ H X ZZ L L L L L L L L H SS SW SBWa SBWb SBWc SBWd DQ(n) DQ(n+1) MODE L H X X X X X DOUT 0-35 Read Cycle ALL Bytes L L L H H H X DIN 0-8 Write Cycle 1st Byte L L H L H H X DIN 9-17 Write Cycle 2nd Byte L L H H L H X DIN 18-26 Write Cycle 3rd Byte L L H H H L X DIN 27-35 Write Cycle 4th Byte L L L L L L X DIN 0-35 Write Cycle ALL Byte L L H H H H X High-Z Abort Write Cycle H X X X X X X High-Z Deselect Cycle X X X X X X High-Z High-Z Sleep Mode Clock Truth Table Operation Read Read Sleep(ZZ=H) Write( SW =L) Deselect( SS =H) G L H X X X DQ DOUT 0-35 High-Z High-Z DIN High-Z PRELIMINARY (February, 1999, Version 2.0) 4 AMIC Technology, Inc. 5 Page Timing Diagram (Read and Deselect Cycles) A65H73361/A65H83181 Series CK SA SS tKHKL tKLKH tKHKH tAVKH A1 A2 tKHAX tWVKH A3 tKHSX tSVKH SW tKHWX tGLQV G DQ tGHQZ tKHQX Q1 tKHQZ Q2 tGLQX tKHQV A3 A4 tKHQX4 Q3 Q4 tKHQV PRELIMINARY (February, 1999, Version 2.0) 10 AMIC Technology, Inc. 11 Page

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Hoja de datos destacado

Número de pieza	Descripción	Fabricantes
A65H83181P-5	128K x 36 & 256K x 18 Late Write Synchronous Fast SRAM with Pipelined Data Output	AMIC Technology
A65H83181P-6	128K x 36 & 256K x 18 Late Write Synchronous Fast SRAM with Pipelined Data Output	AMIC Technology
A65H83181P-7	128K x 36 & 256K x 18 Late Write Synchronous Fast SRAM with Pipelined Data Output	AMIC Technology

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