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ACT-SF2816N-39P3Q Schematic ( PDF Datasheet ) - Aeroflex Circuit Technology

Teilenummer ACT-SF2816N-39P3Q
Beschreibung ACT-SF2816 High Speed 128Kx16 SRAM / 512Kx16 FLASH Multichip Module
Hersteller Aeroflex Circuit Technology
Logo Aeroflex Circuit Technology Logo 




Gesamt 11 Seiten
ACT-SF2816N-39P3Q Datasheet, Funktion
ACT–SF2816 High Speed
128Kx16 SRAM / 512Kx16 FLASH
Multichip Module
FEATURES
CIRCUIT TECHNOLOGY
www.aeroflex.com
I 2 – 128K x 8 SRAMs & 2 – 512K x 8 Flash Die in
One MCM
I Access Times of 25ns (SRAM) and 60ns (Flash)
or 35ns (SRAM) and 70 or 90ns (Flash)
I Organized as 128K x 16 of SRAM and 512K x 16
of Flash Memory with Separate Data Buses
I Both Blocks of Memory are User Configurable as
512KX8 AND 1MX8 Respectively
I Low Power CMOS
I Input and Output TTL Compatible Design
I MIL-PRF-38534 Compliant MCMs Available
I Decoupling Capacitors and Multiple Grounds for
Low Noise
I Industrial and Military Temperature Ranges
I Industry Standard Pinouts
Note: Programming information available upon request
I Packaging – Hermetic Ceramic
G 66 Pin, 1.08" x 1.08" x .160" PGA Type, No Shoulder,
Aeroflex code# "P3"
G 66 Pin, 1.08" x 1.08" x .185" PGA Type, With
Shoulder, Aeroflex code# "P7"
G 68 Lead, .94" x .94" x .140" Single-Cavity Small
Outline Gull Wing, Aeroflex code# "F18" (Drops into
the 68 Lead JEDEC .99"SQ CQFJ footprint)
I DESC SMD – TBD
FLASH MEMORY FEATURES
I Sector Architecture (Each Die)
G 8 Equal Sectors of 64K bytes each
G Any combination of sectors can be erased with one
command sequence
I +5V Programing, +5V Supply
I Embedded Erase and Program Algorithms
I Hardware and Software Write Protection
I Internal Program Control Time.
I 10,000 Erase / Program Cycles
Block Diagram – PGA Type Packages (P3 & P7) & CQFP (F18)
SWE1 SCE1 SWE2 SCE2 FWE1 FCE1 FWE2 FCE2
OE
A0 A18
128Kx8
SRAM
128Kx8
SRAM
512Kx8
Flash
512Kx8
Flash
8
www.DataSheet4U.com SI/O0-7
8
SI/O8-15
8
FI/O0-7
8
FI/O8-15
Pin Description
FI/O0-15 Flash Data I/O
SI/O0-15 SRAM Data I/O
A0–18
Address Inputs
FWE1-2 Flash Write Enables
SWE1-2 SRAM Write Enables
FCE1-2 Flash Chip Enables
SCE1-2 SRAM Chip Enables
OE Output Enable
NC Not Connected
VCC Power Supply
GND
Ground
eroflex Circuit Technology - Advanced Multichip Modules © SCD3853 REV B 5/18/99






ACT-SF2816N-39P3Q Datasheet, Funktion
AC Waveforms for Flash Memory Read Operations
Addresses
FCE
OE
FWE
Outputs
tRC
Addresses Stable
tACC
tOE
tDF
High Z
tCE
tOH
Output Valid
High Z
Write/Erase/Program
Operation for Flash Memory, FWE Controlled
Data Polling
Addresses
5555H
tWC
PA
tAS tAH
PA
FCE
OE
FWE
Data
tGHWL
tWP
tCE
tDS
tWPH
AOH
tDH
PD
tWHWH1
D7 DOUT
5.0V
www.DataSheet4U.com
Notes:
1. PA is the address of the memory location to be programmed.
2. PD is the data to be programmed at byte address.
3. D7 is the 0utput of the complement of the data written to the deviced.
4. Dout is the output of the data written to the device.
5. Figure indicates last two bus cycles of four bus cycle sequence.
tRC
tOE
tCE
tDF
tOH
Aeroflex Circuit Technology
6 SCD3853 REV B 5/18/99 Plainview NY (516) 694-6700

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