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AD2S100 Schematic ( PDF Datasheet ) - Analog Devices

Teilenummer AD2S100
Beschreibung AC Vector Processor
Hersteller Analog Devices
Logo Analog Devices Logo 




Gesamt 12 Seiten
AD2S100 Datasheet, Funktion
a
AC Vector Processor
AD2S100
FEATURES
Complete Vector Coordinate Transformation on Silicon
Mixed Signal Data Acquisition
Three-Phase 120؇ and Orthogonal 90؇ Signal
Transformation
Three-Phase Balance Diagnostic–Homopolar Output
APPLICATIONS
AC Induction and DC Permanent
Magnet Motor Control
HVAC, Pump, Fan Control
Material Handling
Robotics
Spindle Drives
Gyroscopes
Dryers
Washing Machines
Electric Cars
Actuator
Three-Phase Power Measurement
Digital-to-Resolver & Synchro Conversion
GENERAL DESCRIPTION
The AD2S100 performs the vector rotation of three-phase 120
degree or two-phase 90 degree sine and cosine signals by trans-
ferring these inputs into a new reference frame which is controlled
by the digital input angle φ. Two transforms are included in the
AD2S100. The first is the Clarke transform which computes
the sine and cosine orthogonal components of a three-phase
input. These signals represent real and imaginary components
which then form the input to the Park transform. The Park
transform relates the angle of the input signals to a reference
frame controlled by the digital input port. The digital input
port is a 12-bit parallel binary representation.
If the input signals are represented by Vds and Vqs, respectively,
where Vds and Vqs are the real and imaginary components, then
the transformation can be described as follows:
Vds' = Vds Cosφ – Vqs Sinφ
Vqs' = Vds Sinφ + Vqs Cosφ
Where Vds' and Vqs' are the output of the Park transform
and Sinφ, and Cosφ are the values internally derived by the
AD2S100 from the binary digital data.
The input section of the device can be configured to accept
either three-phase inputs, two-phase inputs of a three-phase
system, or two 90 degree input signals. The homopolar output
detects the imbalance of a three-phase input only. Under nor-
mal conditions, this output will be zero.
FUNCTIONAL BLOCK DIAGRAM
Cosθ Sinθ
INPUT
DATA
STROBE
φ POSITION
PARALLEL
DATA
12 BITS
Ia
Cosθ
Ib
Cos (θ + 120°)
Cos (θ + 240°) Ic
Sinθ
SINE AND
SECTOR COSINE
Vds MULTIPLIER MULTIPLIER
30-20
Vqs
SECTOR
MULTIPLIER
SINE AND
COSINE
MULTIPLIER
BUSY
Vds'
2φ -3φ
Vqs'
Va Cos θ + φ
Vb Cos (θ + 120° + φ)
Vc Cos (θ + 240° + φ)
Sin θ + φ
CONV1
CONV2
DECODE
Ia + Ib + Ic
3
HOMOPOLAR HOMOPOLAR +5V GND –5V
OUTPUT
REFERENCE
The digital input section will accept a resolution of up to 12 bits
(AD2S100). An input data strobe signal is required to synchro-
nize the position data and load this information into the device
counters. A busy output is provided to identify the conversion
status of the AD2S100. The busy period represents the conver-
sion time of the vector rotation.
Two analog output formats are available. A two-phase rotated
output facilitates multiple rotation blocks. Three phase format
signals are available for use with a PWM inverter.
PRODUCT HIGHLIGHTS
Hardware Peripheral for Standard Microcontrollers and
DSP Systems
The AD2S100 removes the time consuming cartesian transfor-
mations from digital processors and benchmarks a speed im-
provement of 30:1 on standard 20 MHz processors. AD2S100
transformation time = 2 µs (typ).
Field Oriented Control of AC and DC Brushless Motors
The AD2S100 accommodates all the necessary functions to
provide a hardware solution for ac vector control of induction
motors and dc brushless motors.
Three-Phase Imbalance Detection
The AD2S100 can be used to sense overcurrent situations or
imbalances in a three-phase system via the homopolar output.
Resolver-to-Digital Converter Interface
The AD2S100 provides general purpose interface for position
sensors used in the application of dc brushless and ac induction
motor control.
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
Fax: 617/326-8703






AD2S100 Datasheet, Funktion
AD2S100
CONVERTER OPERATION
The architecture of the AD2S100 is illustrated in Figure 3. The
AD2S100 is configured in the forward transformation which ro-
tates the stator coordinates to the rotor reference frame.
Forward Rotation
In this configuration the 3φ–2φ Clark is bypassed, and inputs are
fed directly into the quadrature (PH/IP4) and direct (PH/ IPI)
inputs to the Park transform, eiφ, where φ is defined by the
AD2S100’s digital input. Position data, φ, is loaded into the in-
put latch on the positive edge of the strobe pulse. (For detail on
the timing, please refer to the “timing diagram.”) The negative
edge of the strobe signifies that conversion has commenced. A
busy pulse is subsequently produced as data is passed from the
input latches to the Sin and Cos multipliers. During the loading
of the multiplier, the busy pulse remains high to ensure simulta-
neous setting of φ in both the Sin and Cos registers.
The negative edge of the busy pulse signifies that the multipliers
are set up and the orthogonal analog inputs are multiplied real
time. The resultant two outputs are accessed via the PH/OPI
(Pin 7) and PH/OP4 (Pin 6), alternatively they can be directly
applied to the output Clark transform. The Clark output is the
vector sum of the analog input vector (Cosθ (PH/OPl), Cos (θ +
120°) (PH/OP2), Cos (θ + 240°) (PH/OP3) and the digital in-
put vector φ.
For other configurations, please refer to “Forward and Reverse
Transformation.”
CONNECTING THE CONVERTER
Power Supply Connection
The power supply voltages connected to VDD and VSS pins
should be +5 V dc and –5 V dc and must not be reversed. Pin 4
(VDD) and Pin 41 (VDD) should both be connected to +5 V;
similarly, Pin 5 (VSS) and Pin 19 (VSS) should both be con-
nected to –5 V dc.
It is recommended that decoupling capacitors, 100 nF (ceramic)
and 10 µF (tantalum) or other high quality capacitors, are con-
nected in parallel between the power line VDD, VSS and AGND
adjacent to the converter. Separate decoupling capacitors should
be used for each converter. The connections are shown in Fig-
ure 4.
+5V
+ 100nF
10µF
GND
+
10µF
100nF
1
AGND
12
AD2S100
TOP VIEW
34
23
–5V
ANALOG SIGNAL INPUT AND OUTPUT CONNECTIONS
Input Analog Signals
All analog signal inputs to AD2S100 are voltages. There are two
different voltage levels of three-phase (0°, 120°, 240°) signal in-
puts. One is the nominal level, which is ± 2.8 V dc or 2 V rms
and the corresponding input pins are PH/IP1 (Pin 17), PH/IP2
(Pin 15), PH/IP3 (Pin 13) and PH/IP4 (Pin 11).
The high level inputs can accommodate voltages from nominal
up to a maximum of ± VDD/VSS. The corresponding input pins
are PH/IPH1 (Pin 16), PH/IPH2 (Pin 14) and PH/IPH3 (Pin
12). The homopolar output can only be used in the three-phase
connection mode.
The converter can accept both two-phase format and three-
phase format input signals. For the two-phase format input, the
two inputs must be orthogonal to each other. For the three-
phase format input, there is the choice of using all three inputs
or using two of the three inputs. In the latter case, the third in-
put signal will be generated internally by using the information
of other two inputs. The high level input mode, however, can
only be selected with three-phase/three-input format. All these
different conversion modes, including nominal/high input level
and two/three-phase input format can be selected using two se-
lect pins (Pin 23, Pin 24). The functions are summarized in
Table I.
Table I. Conversion Mode Selection
Mode Description
CONV1 CONV2
(Pin 23) (Pin 24)
MODE1
MODE2
MODE3
2-Phase Orthogonal with 2 Inputs
Nominal Input Level
3-Phase (0°, 120°, 240°) with 3 Inputs
Nominal/High Input Level*
3-Phase (0°, 120°, 240°) with 2 Inputs
Nominal Input Level
NC
DGND
VDD
DGND
VDD
VDD
*The high level input mode can only be selected with MODE2.
MODE1: 2-Phase/2 Inputs with Nominal Input Level
In this mode, PH/IP1 and PH/IP4 are the inputs and the Pins
12 through 16 must be left unconnected.
MODE2: 3-Phase/3 Inputs with Nominal/High Input Level
In this mode, either nominal or high level inputs can be used.
For nominal level input operation, PH/IP1, PH/IP2 and PH/IP3
are the inputs, and there should be no connections to PH/IPH1,
PH/IPH2 and PH/IPH3; similarly, for high level input opera-
tion, the PH/IPH1, PH/IPH2 and PH/IPH3 are the inputs, and
there should be no connections to PH/IP1, PH/IP2 and PH/IP3.
In both cases, the PH/IP4 should be left unconnected. For high
level signal input operation, select MODE2 only.
MODE3: 3-Phase/2 Inputs with Nominal Input Level
In this mode, PH/IP2 and PH/IP3 are the inputs and the third
signal will be generated internally by using the information of
other two inputs. It is recommended that PH/IP1, PH/IPH1,
PH/IPH2, PH/IP4 and PH/IPH3 should be left unconnected.
Figure 4. AD2S100 Power Supply Connection
–6– REV. A

6 Page









AD2S100 pdf, datenblatt
AD2S100
DIGITAL-TO-RESOLVER AND SYNCHRO CONVERSION
The AD2S100 can be configured for use as a 12-bit digital-to-
resolver (DRC) or synchro converter (DSC). DRCs and DSCs
are used to simulate the outputs of a resolver or a synchro. The
simulated outputs are represented by the transforms outlined
below.
Resolver Outputs
Asinωt.cosφ
Asinωt.sinφ
Synchro Outputs
Asinωt.sinφ
Asinωt.sin (φ + 120°)
Asinωt.sin (φ + 240°)
where: Asinωt = fixed ac reference
φ = digital input angle, i.e., shaft position
The waveforms are shown in Figures 18 and 19.
S2 TO S4
(COS)
S3 TO S1
(SIN)
R2 TO R4
(REF)
0° 90° 180° 270° 360°
θ
Figure 18. Electrical Representation and Typical Resolver
Signals
S1 TO S2
S2 TO S3
S3 TO S1
R1 TO R2
0°
90°
180°
270°
360°
θ
Figure 19. Electrical Representation and Typical Synchro
Signals
Configuring the AD2S100 for DRC and DSC operation is done
by the following.
DRC—Must Select Mode 1
Inputs PH/IP4 Pin 11
PH/IP1 Pin 1
Outputs PH/OP1 Pin 7
PH/OP4 Pin 6
AGND
Reference Asinωt
Asinωt Cosφ
Asinωt Sinφ
DSC—Must Select Mode 1
Inputs PH/IP4 Pin 11 Reference Asinωt
PH/IP1 Pin 17 AGND
Outputs PH/OP1 Pin 7 –Asinωt Sinφ
PH/OP2 Pin 9 –Asinωt Sin (φ + 120°)
PH/OP3 Pin 8 –Asinωt Sin (φ + 240°)
NOTES
1. Valid information is only available after the strobe pulse and BUSY go low.
For more information on DRCs see the AD2S65/AD2S66 data sheet.
2. To correct for inverse phasing of the DSC outputs the reference should be
inverted, or the MSB can be inverted.
APPLICATION NOTES LIST
1. “Vector Control Using a Single Vector Rotation Semiconduc-
tor for Induction and Permanent Magnet Motors,” by F. P.
Flett, Analog Devices.
2. “Gamana – DSP Vector Coprocessor for Brushless Motor
Control,” by Analog Devices and Infosys Manufacturing
System.
3. “Silicon Control Algorithms for Brushless Permanent Magnet
Synchronous Machines,” by F. P. Flett.
4. “Single Chip Vector Rotation Blocks and Induction Motor
Field Oriented Control,” by A. P. M. Van den Bossche and
P. J. M. Coussens.
5. “Three Phase Measurements with Vector Rotation Blocks in
Mains and Motion Control,” P. J. M. Coussens, et al.
6. “Digital to Synchro and Resolver Conversion with the AC
Vector Processor AD2S100,” by Dennis Fu.
7. “Experiment with the AD2S100 Evaluation Board,” by
Dennis Fu.
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
44-Lead Plastic Leaded Chip Carrier (P-44A)
0.048 (1.21)
0.042 (1.07)
0.048 (1.21)
0.042 (1.07)
6
7
PIN 1
IDENTIFIER
TOP VIEW
0.056 (1.42)
0.042 (1.07)
40
39
0.180 (4.57)
0.165 (4.19)
0.025 (0.63)
0.015 (0.38)
0.021 (0.53)
0.013 (0.33)
0.63 (16.00)
0.59 (14.99)
0.032 (0.81)
0.026 (0.66)
0.020
(0.50)
R
17
18
0.656 (16.66)
0.650 (16.51) SQ
0.695 (17.65)
0.685 (17.40) SQ
29
28
0.050
(1.27)
BSC
0.040 (1.01)
0.025 (0.64)
0.110 (2.79)
0.085 (2.16)
–12–
REV. A

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