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PDF AD28MSP02 Data sheet ( Hoja de datos )
| Número de pieza | AD28MSP02 | |
| Descripción | Voiceband Signal Port | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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FEATURES
Complete Analog I/O Port for Voiceband DSP
Applications
Linear-Coded 16-Bit Sigma-Delta ADC
Linear-Coded 16-Bit Sigma-Delta DAC
On-Chip Anti-Aliasing and Anti-lmaging Filters
On-Chip Voltage Reference
8 kHz Sampling Frequency
Twos Complement Coding
65 dB SNR + THD
Programmable Gain on DAC and ADC
Serial Interface To DSP Processors
24-Pin DlP/28-Lead SOIC
Single 5 V Power Supply
Voiceband Signal Port
AD28msp02
FUNCTIONAL BLOCK DIAGRAM
VOICEBAND
ANALOG
INPUT A
VOICEBAND
ANALOG
INPUT B
MUX
+20dB
AMP
VOLTAGE
REFERENCE
16-BIT
SIGMA-
DELTA ADC
DIGITAL
DATA AND
CONTROL
SERIAL
PORT
DIFFERENTIAL
ANALOG
OUTPUT
PGA
16-BIT
SIGMA-
DELTA DAC
GENERAL DESCRIPTION
The AD28msp02 Voiceband Signal Port is a complete analog
front end for high performance voiceband DSP applications.
Compared to traditional µ-law and A-law codecs, the
AD28msp02’s linear-coded ADC and DAC maintain wide
dynamic range while maintaining superior SNR and THD. A
sampling rate of 8.0 kHz coupled with 65 dB SNR + THD per-
formance make the AD28msp02 attractive in many telecom and
speech processing applications, for example digital cellular radio
and high quality telephones. The AD28msp02 simplifies overall
system design by requiring only a single +5 V power supply.
The inclusion of on-chip anti-aliasing and anti-imaging filters,
16-bit sigma-delta ADC and DAC, and programmable gain
amplifiers ensures a highly integrated and compact solution to
voiceband analog processing requirements. Sigma-delta conver-
sion technology eliminates the need for complex off-chip anti-
aliasing filters and sample-and-hold circuitry.
The AD28msp02’s serial I/O port provides an easy interface to
host DSP microprocessors such as the ADSP-2101, ADSP-2105
and ADSP-2111. The AD28msp02 is available in a 24-pin, 0.3"
plastic DIP and a 28-lead SOIC package.
FUNCTIONAL DESCRIPTION
Figure 1 shows a block diagram of the AD28msp02.
A/D CONVERSION
The A/D conversion circuitry of the AD28msp02 consists of two
analog input amplifiers, an optional 20 dB preamplifier, and
a sigma-delta analog-to-digital converter (ADC). The analog
input signal to the AD28msp02 must be ac-coupled.
Analog Input Amplifiers
The two analog input amplifiers (NORM, AUX) are internally
biased by an on-chip voltage reference in order to allow opera-
tion of the AD28msp02 with a single +5 V power supply.
An analog multiplexer selects either the NORM or AUX ampli-
fier as the input to the ADC’s sigma-delta modulator. The
optional 20 dB preamplifier may be used to increase the signal
level; the preamplifier can be inserted before the modulator or
can be bypassed. Input signal level to the sigma-delta modulator
should not exceed VINMAX, which is specified under “Analog
Interface Electrical Characteristics.” Refer to “Analog Input” in
the “Design Considerations” section of this data sheet for more
information.
The input multiplexer and 20 dB preamplifier are configured by
Bits 0 and 1 (IPS, IMS) of the AD28msp02’s control register. If
the multiplexer setting is changed while an input signal is being
processed, the ADC’s output must be allowed time to settle to
ensure that the output data is valid.
ADC
The ADC consists of a 2nd-order analog sigma-delta modulator,
an anti-aliasing decimation filter, and a digital high-pass filter.
The sigma-delta modulator noise-shapes the signal and pro-
duces 1-bit samples at a 1.0 MHz rate. This bit stream, which
represents the analog input signal, is fed to the anti-aliasing
decimation filter.
Decimation Filter
The anti-aliasing decimation filter contains two stages. The first
stage is a sinc4 digital filter that increases resolution to 16 bits
and reduces the sample rate to 40 kHz. The second stage is an
IIR low-pass filter.
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
Fax: 617/326-8703
1 page  
Note that the ADSP-2101’s SPORT0 communicates with the
AD28msp02’s SPORT while the ADSP-2101’s Flag Output
(FO) is used to signal the AD28msp02’s DATA/CNTRL input.
SPORT1 on the ADSP-2101 must be configured for flags and
interrupts in this system.
Figure 6 shows an ADSP-2101 assembly language program that
initializes the AD28msp02 and implements digital loopback
through the DSP processor.
AD28msp02
AD28msp02 SDO
SDOFS
SCLK
DATA/CNTRL
SDI
SDIFS
DR0
RFS0
SCLK0
FO
DT0
TFS0
ADSP-2101
Figure 5. AD28msp02-to-ADSP-2101 Interface
{ This ADSP-2101 program initializes the AD28msp02 }
{ and executes a loopback, or talk-through, routine. }
.MODULE/ABS = 0/BOOT = 0 test1;
resetv:
irq2v:
st0x:
sr0x:
irq1v:
irq0v:
timerv:
JUMP begin;
RTI; RTI; RTI;
RTI; RTI; RTI; RTI;
RTI; RTI; RTI; RTI;
ax0 = rx0;
tx0 = ax0;
RTI; RTI;
RTI; RTI; RTI; RTI;
RTI; RTI; RTI; RTI;
RTI; RTI; RTI; RTI;
{restart}
{IRQ2}
{SPORT0 Tx}
{SPORT0 Rx}
{irq1}
{irq0}
begin:
RESET FLAG OUT;
AX0 = 0x2A0F;
DM (0x3FF6) = AX0;
{Configure ADSP-2101 SPORT0 for }
{ ext. SCLK, ext. RFS, int. TFS }
AX0 = 0x101F;
{ Enable ADSP-2101 SPORT0, }
DM (0x3FFF) = AX0; { configure SPORT1 for Flag Out }
IMASK= 0x10;
AX0 = 0x30;
TX0 = AX0;
{ Write control word to take}
{ AD28msp02 out of powerdown }
IDLE;
NOP;
IMASK= 0x08;
SET FLAG OUT;
wait: JUMP wait;
NOP;
{ Wait for receive interrupt }
.ENDMOD;
Figure 6. ADSP-2101 Digital Loopback Routine
REV. 0
–5–
5 Page 
SPECIFICATIONS
RECOMMENDED OPERATING CONDITIONS
Parameter
K Grade
Min Max
VDD, VCC
TAMB
Supply Voltage
Ambient Operating Temperature
4.50
0
5.50
+70
Refer to Environmental Conditions for information on case temperature and thermal specifications.
AD28msp02
B Grade
Min Max
4.50 5.50
–40 +85
Unit
V
°C
ABSOLUTE MAXIMUM RATINGS*
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V
Input Voltage . . . . . . . . . . . . . . . . . . . . . –0.3 V to VDD + 0.3 V
Output Voltage Swing . . . . . . . . . . . . . . –0.3 V to VDD + 0.3 V
Operating Temperature Range (Ambient) . . . –40°C to +85°C
Storage Temperature Range . . . . . . . . . . . . . –55°C to +150°C
Lead Temperature (5 sec) SOIC . . . . . . . . . . . . . . . . . +280°C
*Stresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. These are stress rating only and functional
operation of the device at these or any other conditions above those indicated in the
operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
ESD SENSITIVITY
The AD28msp02 features proprietary input protection circuitry to dissipate high-energy discharges
(Human Body Model). Per method 3015 of MIL-STD-883C, the AD28msp02 has been classified as
a Class 1 device.
Proper ESD precautions are strongly recommended to avoid functional damage or performance
degradation. Charges readily accumulate on the human body and test equipment and discharge without
detection. Unused devices must be stored in conductive foam or shunts, and the foam should be
discharged to the destination socket before devices are removed.
WARNING!
ESD SENSITIVE DEVICE
REV. 0
–11–
11 Page | ||
| Páginas | Total 20 Páginas | |
| PDF Descargar | [ Datasheet AD28MSP02.PDF ] | |
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