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AD261 Schematic ( PDF Datasheet ) - Analog Devices

Teilenummer AD261
Beschreibung High Speed/ Logic Isolator
Hersteller Analog Devices
Logo Analog Devices Logo 




Gesamt 6 Seiten
AD261 Datasheet, Funktion
a
High Speed, Logic Isolator
AD261
FEATURES
Isolation Test Voltage: To 3.5 kV rms
Five Isolated Logic Lines: Available in Six I/O Configurations
Logic Signal Bandwidth: 20 MHz (min)
CMV Transient Immunity: 10 kV/s min
Waveform Edge Transmission Symmetry: ؎1 ns
Field and System Output Enable/Three-State Functions
Performance Rated Over –25؇C to +85؇C
UL1950, IEC950, EN60950 Certification (VDE, CE, Pending)
APPLICATIONS
PLC/DCS Analog Input and Output Cards
Communications Bus Isolation
General Data Acquisition Applications
IGBT Motor Drive Controls
High Speed Digital I/O Ports
GENERAL DESCRIPTION
The AD261 is designed to isolate five digital control signals
to/from a microcontroller and its related field I/O components.
Six models allow all I/O combinations from five input lines to
five output lines, including combinations in between. Every
AD261 effectively replaces up to five opto-isolators.
Each line of the AD261 has a bandwidth of 20 MHz (min) with
a propagation delay of only 14 ns, which allows for extremely
fast data transmission. Output waveform symmetry is maintained
to within ± 1 ns of the input so the AD261 can be used to accu-
rately isolate time-based PWM signals.
All field or system output pins of the AD261 can be set to a high
resistance three-state level by use of the two enable pins. A field
output three-stated offers a convenient method of presetting
logic levels at power-up by use of pull-up/down resistors. Sys-
tem side outputs being three-stated allows for easy multiplexing
of multiple AD261s.
The isolation barrier of the AD261 B Grade is 100% tested
as high as 3.5 kV rms (system to field). The barrier design also
provides excellent common-mode transient immunity from
10 kV/µs common-mode voltage excursions of field side termi-
nals relative to the system side, with no false output triggering
on either side.
Each output is updated within nanoseconds by input logic tran-
sitions, the AD261 also has a continuous output update feature
that automatically updates each output based on the dc level of
the input. This guarantees the output is always valid 10 µs after
a fault condition or after the power-up reset interval.
FUNCTIONAL BLOCK DIAGRAM
LATCH
F0
STTHARTEEE-
LINE 0
D
E
S0
LATCH
F1
STTHARTEEE-
LINE 1
D
E
2 S1
LATCH
F2
STTHARTEEE-
LINE 2
D
E
3 S2
LATCH
F3
D
E
LINE 3
THSRTAETEE-
4 S3
LATCH
F4
D
E
LINE 4
THSRTAETEE-
5 S4
ENABLEFLD 17
+5V dcFLD 16 +5V dc
5Vdc RTN
5V RTNFLD 15
6 ENABLESYS
+5V dc
7 +5V dcSYS
5Vdc RTN
8 5V RTNSYS
FIELD
SYSTEM
TYPICAL MODEL
(AD261-2)
PRODUCT HIGHLIGHTS
Six Isolated Logic Line I/O Configurations Available: The
AD261 is available in six pin-compatible versions of I/O con-
figurations to meet a wide variety of requirements.
Wide Bandwidth with Minimal Edge Error: The AD261
affords extremely fast isolation of logic signals due to its 20 MHz
bandwidth and 14 ns propagation delay. It maintains a wave-
form input-to-output edge transition error of typically less than
± 1 ns (total) for positive vs. negative transition.
3.5 kV rms Test Voltage Isolation Rating: The AD261
B Grade is rated to operate at 1.25 kV rms and is 100% pro-
duction tested at 3.5 kV rms, using a standard ADI test method.
High Transient Immunity: The AD261 rejects common-
mode transients slewing at up to 10 kV/µs without false trigger-
ing or damage to the device.
(Continued on page 5)
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 1997






AD261 Datasheet, Funktion
AD261
Logic information is sent across the barrier as “set-hi/set-lo”
data that is derived from logic level transitions of the input. At
power-up or after a fault condition, an output might not repre-
sent the state of the respective channel input to the isolator. An
internal circuit operates in the background which interrogates
all inputs about every 5 µs and in the absence of logic transi-
tions, sends appropriate “set-hi” or “set-lo” data across the
barrier.
Recovery time from a fault condition or at power-up is thus
between 5 µs and 10 µs.
INPUT
SCHMITT
TRIGGER
BUFFER
3.5kV
ISOLATION DATA OUTPUT
DRIVER BARRIER RECEIVER BUFFER
DATA IN
DQ
OUT
ENABLE
G
GATED
TRANSPARENT
LATCH
CONTINUOUS
UPDATE CIRCUIT
Figure 1. Simplified Block Diagram
ENABLE
POSITIVE GOING
INPUT THRESHOLD
NEGATIVE GOING
INPUT THRESHOLD
HYSTERESIS
OUTPUT
63%
PROPAGATION DELAY
tPD = 14ns
tff
37%
EFFECTIVE
CIRCUIT
MODEL
5pF
INPUT
CAPACITANCE
BUFFER
DELAY LINE
BUFFER
14ns
100
trr = tff = 100x CTOTAL OUTPUT CAPACITANCE
Х0.5ns – NO LOAD
5pF
OUTPUT
CAPACITANCE
= 5.5ns INTO 50pF
TOTAL DELAY = tPD ؉ trr = 13ns (NO LOAD), 18ns (50pF LOAD)
Figure 2. Typical Timing and Delay Models
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
22-Pin Plastic DIP
(ND-22A)
1.500 (38.1) MAX
0.550 (13.97)
MAX
0.440
SIDE VIEW
(11.18) END VIEW
1
8
MAX
15 22
0.160 (4.06) 0.050 (1.27)
0.140 (3.56)
0.075 (1.91)
PIN 1
0.020 ؋ 0.010
(0.508 ؋ 0.254)
16 PLACES
0.100
(2.54)
0.250
(6.35)
SYSTEM
BOTTOM
VIEW
0.738* (18.75)
FIELD
0.650 (16.51)
0.050
(1.27)
*CREEPAGE PATH (SUBTRACT APPROXIMATELY
0.079 (2mm) FOR SOLDER PAD RADII ON PC BOARD.
THIS SPACING SUPPORTS THE INTRINSICALLY SAFE
RATING OF 750V.
0.350
(8.89)
–6–
REV. 0

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