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AD20MSP415 Schematic ( PDF Datasheet ) - Analog Devices

Teilenummer AD20MSP415
Beschreibung GSM/DCS1800/PCS1900 Baseband Processing Chipset
Hersteller Analog Devices
Logo Analog Devices Logo 




Gesamt 8 Seiten
AD20MSP415 Datasheet, Funktion
a
GSM/DCS1800/PCS1900
Baseband Processing Chipset
AD20msp415
FEATURES
Complete Baseband Processing Chipset Performs:
Speech Coding/Decoding (GSM 06.XX)
Channel Coding/Decoding (GSM 05.03)
Equalization with 16-State Viterbi, Soft Decision
All ADC and DAC Interface Functions
Includes All Radio, Auxiliary and Voice Interfaces
Support for GSM Data Services
Embedded 16-Bit Microcontroller
Embedded 16-Bit DSP
Integrated SIM and Keyboard Interface
Interface to AD6430 GSM RF Chipset
Interface to EFR Coprocessor
JTAG Boundary Scan
Layer 1 Software Provided with Chipset
Software Compatible with AD20msp410
Full Phase 2 Protocol Stack Software Available
Full Reference Design Available for
Baseband Section and Radio Section
Ultralow Power Design
2.7 V to 3.3 V Operating Voltage
Intelligent Power Management Features
XXX mW Power Dissipation in Talk Mode
XX mW Power Dissipation in Standby Mode
Two TQFP Devices, Occupying Less than 7.5 cm2
APPLICATIONS
GSM/DCS1800/PCS1900 Mobile Radios
GENERAL DESCRIPTION
The Analog Devices GSM Baseband Processing Chipset provides
a competitive solution for GSM based Mobile Radio Systems.
It is designed to be fully integrated, easy to use, and compat-
ible with a wide range of product solutions. Examples are
GSM900, DCS1800, PCS1900 handsets and PCMCIA data
cards. The AD20msp415 is the higher integrated successor of
the AD20msp410 chipset, which passed European GSM Type
Approval in June, 1996.
The chipset consists of two highly integrated, sub-micron, low
power CMOS components that perform the entire baseband
signal processing of the GSM handset. The system architecture
is designed to be easily integrated into current designs and form
the basis for next generation designs.
The chipset uses an operating supply voltage of 2.7 V to 3.3 V
which, coupled with the extensive power management features,
significantly reduces the drain on battery power and extends the
handsets talk time and standby time.
SYSTEM ARCHITECTURE
256K 16
ROM
128K 8
RAM
DISPLAY
2K 8
EEPROM
KEYPAD
AD20msp415
VOICEBAND/
BASEBAND
CODEC
AD6421
GSM
PROCESSOR
AD6422
RADIO
SIM
DATA
TERMINAL
ADAPTER
CHIPSET COMPONENTS
GSM Processor (GSMP)
The AD6422 combines application specific hardware, an em-
bedded 16-bit DSP and an embedded 16-bit microcontroller
(Hitachi H8/300H). It performs channel coding and decoding
and executes the protocol stack and user software. The DSP
implements full rate speech transcoding according to GSM
specifications, including Discontinuous Transmission (DTX)
and Comfort Noise Insertion (CNI). A high performance soft-
decision Viterbi equalizer is also implemented in software em-
bedded in the DSP. The embedded microcontroller executes
the Layer 1, 2, 3 and user MMI software. The required Layer 1
software is supplied with the chipset. To ensure minimum power
consumption, the GSMP has been designed to control all the
power-down functions of the other components in the handset.
Voiceband/Baseband Converter (VBC)
The AD6421 performs the voiceband and baseband analog-to-
digital and digital-to-analog conversions, interfacing the digital
sections of the chipset to the microphone, loudspeaker and radio
section. In addition, the VBC contains all the auxiliary convert-
ers for burst-ramping, AFC, AGC, battery and temperature
monitoring. The chipset interfaces directly with the radio and
supplies all the synthesizer and timing control signals required
to support two synthesizers and a variety of radio architectures
including the AD6450 GSM RF-Chipset.
Software
The required Layer 1 software is supplied with the chipset. In
addition, an object code license is available for Layers 2 and 3 of
the protocol stack.
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 1997






AD20MSP415 Datasheet, Funktion
AD20msp415
TEST
INTERFACE
SIM CARD
FLASH
SRAM
DISPLAY
CONTROL
BACKLIGHT
KEYPAD
EEPROM
DATA
INTERFACE
TEST
INTERFACE
SIM
INTERFACE
ACCESSORIES
CLKIN
ADDRESS
DATA
DAI CONTROL
VBC INTERFACE
GSMP
DISPLAY
CONTROL
BACKLIGHT
CONTROL
CLKOUT
POWER
CONTROL
KEYPAD
INTERFACE
EEPROM
INTERFACE
COPROCESSOR
INTERFACE
DATA
INTERFACE
SYNTHESIZER
AND RADIO
CONTROL
13MHz
VCTCXO
DAI
INTERFACE
CLOCK
POWER
SUBSYSTEM
COPROCESSOR
(OPTIONAL)
VOICEBAND
ANALOG I/O
AFC DAC
SERIAL
PORTS
RAMP DAC
VBC
MCLK
AGC DAC
AUX ADC BASEBAND
ANALOG I/O
Figure 5. Chipset Interfaces
CAR KIT
POWER
AMPLIFIER
RADIO
IF
AMPLIFIER
MODULATOR
DEMODULATOR
SYNTHESIZER
AND RADIO
CONTROL
Digital Interface from the GSMP to Accessories
To allow proper control of external accessories like a car kit, the
AD6422 provides a 10-pin accessory interface comprised of
eight general purpose I/O channels, one chip select and one
power control signal.
Digital Test Interface
The AD6421 and the AD6422 both support advanced test
methodologies by providing JTAG Boundary Scan. Addition-
ally, the AD6422 provides Test/Mode pins, which select differ-
ent test and operating modes.
Digital Interface from GSMP to Optional EFR-Coprocessor
The AD6422 provides a digital interface to an external EFR
Coprocessor (DSP). This coprocessor is required to handle the
Enhanced Full Rate speech codec in PCS1900 mobile radios.
Baseband Processing Key Parts List
Table I lists the major hardware components necessary to com-
plete the GSM baseband processing subsystem.
Table I. List of Key Components
Description
GSMP1
VBC1
EFR-Coprocessor2
FLASH3
SRAM
EEPROM4
Display Driver
Specification
AD6422
AD6421
AD6423
256K × 16, 150 ns
128K × 8, 120 ns
2K × 8
Design Specific
NOTES
1These components comprise the AD20msp415
chipset.
2The EFR-Coprocessor is required only in systems
requiring support of the Enhanced Full Rate speech
codec.
3A size of 4 Mbits is recommended to allow storage of
all GSM Layer (1, 2, 3) programs for GSM Phase 2
as well as a typical User Interface (MMI).
4Can be omitted if parameters are stored in FLASH
memory.
–6– REV. 0

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