|
|
PDF AD1864 Data sheet ( Hoja de datos )
| Número de pieza | AD1864 | |
| Descripción | Complete Dual 18-Bit Audio DAC | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de AD1864 (archivo pdf) en la parte inferior de esta página. Total 12 Páginas | ||
|
No Preview Available !
a
Complete Dual
18-Bit Audio DAC
FEATURES
Dual Serial Input, Voltage Output DACs
No External Components Required
Operates at 8 ؋ Oversampling per Channel
؎5 V to ؎12 V Operation
Cophased Outputs
115 dB Channel Separation
؎0.3% Interchannel Gain Matching
0.0017% THD+N
APPLICATIONS
Multichannel Audio Applications:
Compact Disc Players
Multivoice Keyboard Instruments
DAT Players and Recorders
Digital Mixing Consoles
Multimedia Workstations
PRODUCT DESCRIPTION
The AD1864 is a complete dual 18-bit DAC offering excellent
THD+N, while requiring no external components. Two com-
plete signal channels are included. This results in cophased
voltage or current output signals and eliminates the need for
output demultiplexing circuitry. The monolithic AD1864 chip
includes CMOS logic elements, bipolar and MOS linear
elements and laser-trimmed thin-film resistor elements, all
fabricated on Analog Devices BiMOS II process.
The DACs on the AD1864 chip employ a partially-segmented
architecture. The first four MSBs of each DAC are segmented
into 15 elements. The 14 LSBs are produced using standard
R-2R techniques. Segment and R-2R resistors are laser-
trimmed to provide extremely low total harmonic distortion.
This architecture minimizes errors at major code transitions
resulting in low output glitch and eliminating the need for an
external deglitcher. When used in the current output mode, the
AD1864 provides two cophased ± 1 mA output signals.
Each channel is equipped with a high performance output
amplifier. These amplifiers achieve fast settling and high slew
rate, producing ± 3 V signals at load currents up to 8 mA. Each
output amplifier is short-circuit protected and can withstand
indefinite short circuits to ground.
The AD1864 was designed to balance two sets of opposing
requirements, channel separation and DAC matching. High
channel separation is the result of careful layout techniques. At
the same time, both channels of the AD1864 have been designed
to ensure matched gain and linearity as well as tracking over time
and temperature. This assures optimum performance when used in
stereo and multi-DAC per channel applications.
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
AD1864
DIP BLOCK DIAGRAMS
–VS 1
TRIM 2
MSB 3
AD1864
REFERENCE
REFERENCE
24 +VS
23 TRIM
22 MSB
I OUT 4
AGND 5
21 I OUT
20 AGND
SJ 6
19 SJ
RF 7
VOUT 8
+VL 9
+–
18 R F
+– 17 VOUT
16 –VL
DR 10 18-BIT
LATCH
LR 11
18-BIT
D/A
18-BIT
D/A
18-BIT 15 DL
LATCH 14 LL
CLK 12
13 DGND
A versatile digital interface allows the AD1864 to be directly
connected to standard digital filter chips. This interface employs
five signals: Data Left (DL), Data Right (DR), Latch Left (LL),
Latch Right (LR) and Clock (CLK). DL and DR are the serial
input pins for the left and right DAC input registers. Input data
bits are clocked into the input register on the rising edge of
CLK. A low going latch edge updates the respective DAC
output. For systems using only a single latch signal, LL and LR
may be connected together. For systems using only one DATA
signal, DR and DL may be connected together.
The AD1864 operates from ± 5 V to ± 12 V power supplies. The
digital supplies, VL and –VL, can be separated from the analog
supplies, VS and –VS, for reduced digital feedthrough. Separate
analog and digital ground pins are also provided. The AD1864
typically dissipates only 225 mW, with a maximum power
dissipation of 265 mW.
The AD1864 is packaged in both a 24-pin plastic DIP and a
28-pin PLCC. Operation is guaranteed over the temperature
range of –25°C to +70°C and over the voltage supply range of
± 4.75 V to ± 13.2 V.
PRODUCT HIGHLIGHTS
1. The AD1864 is a complete dual 18-bit audio DAC.
2. 108 dB signal-to-noise ratio for low noise operation.
3. THD+N is typically 0.0017%.
4. Interchannel gain and midscale matching.
5. Output voltages and currents are cophased.
6. Low glitch for improved sound quality.
7. Both channels are 100% tested at 8 × FS.
8. Low Power—only 225 mW typ, 265 mW max.
9. Five-wire Interface for individual DAC control.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700 World Wide Web Site: http://www.analog.com
Fax: 617/326-8703
© Analog Devices, Inc., 1997
1 page  
TOTAL HARMONIC DISTORTION + NOISE
Total Harmonic Distortion plus Noise (THD+N) is defined as
the ratio of the square root of the sum of the squares of the
amplitudes of the harmonics and noise to the value of the
fundamental input frequency. It is usually expressed in percent.
THD+N is a measure of the magnitude and distribution of
linearity error, differential linearity error, quantization error and
noise. The distribution of these errors may be different, depending
on the amplitude of the output signal. Therefore, to be most
useful, THD+N should be specified for both large (0 dB) and
small (–20 dB, –60 dB) signal amplitudes. THD+N measure-
ments for the AD1864 are made using the first 19 harmonics
and noise out to 30 kHz.
SIGNAL-TO-NOISE RATIO
The Signal-to-Noise Ratio is defined as the ratio of the ampli-
tude of the output when a full- scale code is entered to the
amplitude of the output when a midscale code is entered. It is
measured using a standard A-Weight filter. SNR for the
AD1864 is measured for noise components up to 30 kHz.
CHANNEL SEPARATION
Channel separation is defined as the ratio of the amplitude of a
full-scale signal appearing on one channel to the amplitude of
that same signal which couples onto the adjacent channel. It is
usually expressed in dB. For the AD1864 channel separation is
measured in accordance with EIAJ Standard CP-307, Section 5.5.
D-RANGE DISTORTION
D-Range distortion is equal to the value of the total harmonic
distortion + noise (THD+N) plus 60 dB when a signal level of
60 dB below full-scale is reproduced. D-Range is tested with a
1 kHz input sine wave. This is measured with a standard
A-Weight filter as specified by EIAJ Standard CP-307.
GAIN ERROR
The gain error specification indicates how closely the output of
a given channel matches the ideal output for given input data. It
is expressed in % of FSR and is measured with a full-scale output
signal.
INTERCHANNEL GAIN MATCHING
The gain matching specification indicates how closely the
amplitudes of the output signals match when producing
identical input data. It is expressed in % of FSR (Full-Scale
Range = 6 V for the AD1864) and is measured with full-scale
output signals.
MIDSCALE ERROR
Midscale error is the deviation of the actual analog output of a
given channel from the ideal output (0 V) when the twos comple-
ment input code representing half scale is loaded into the input
register of the DAC. It is expressed in mV.
AD1864
INTERCHANNEL MIDSCALE MATCHING
The midscale matching specification indicates how closely the
amplitudes of the output signals of the two channels match
when the twos complement input code representing half scale is
loaded into the input register of both channels. It is expressed in
mV and is measured with half-scale output signals.
–VS 1
TRIM 2
MSB 3
AD1864
REFERENCE
REFERENCE
24 +VS
23 TRIM
22 MSB
I OUT 4
AGND 5
21 I OUT
20 AGND
SJ 6
19 SJ
RF 7
VOUT 8
+VL 9
+–
18 R F
+– 17 VOUT
16 –VL
DR 10 18-BIT
LATCH
LR 11
18-BIT
D/A
18-BIT
D/A
18-BIT 15 DL
LATCH 14 LL
CLK 12
13 DGND
DIP Block Diagram
FUNCTIONAL DESCRIPTION
The AD1864 is a complete, monolithic, dual 18-bit audio DAC.
No external components are required for operation. As shown in
the block diagram, each chip contains two voltage references,
two output amplifiers, two 18-bit serial input registers and two
18-bit DACs.
The voltage reference section provides a reference voltage for
each DAC circuit. These voltages are produced by low-noise
bandgap circuits. Buffer amplifiers are also included. This
combination of elements produces reference voltages that are
unaffected by changes in temperature and time.
The output amplifiers use both MOS and bipolar devices and
incorporate an all NPN output stage. This design technique
produces higher slew rate and lower distortion than previous
techniques. Frequency response is also improved. When
combined with the appropriate on-chip feedback resistor, the
output op amps convert the output current to output voltages.
The 18-bit D/A converters use a combination of segmented
decoder and R-2R architecture to achieve consistent linearity
and differential linearity. The resistors which form the ladder
structure are fabricated with silicon chromium thin film. Laser
trimming of these resistors further reduces linearity errors
resulting in low output distortion.
The input registers are fabricated with CMOS logic gates.
These gates allow the achievement of fast switching speeds and
low power consumption, contributing to the low glitch and low
power dissipation of the AD1864.
REV. A
–5–
5 Page 
AD1864
16.9344
MHz
1 GND TEST 40
2 TEST TEST 39
3 TEST 38
4 TEST 37
5 36
CXD1244S
6 35
7 34
8 BCKO 33
9 XIN DATAL 32
10 VDD
11 VDD
12
GND 31
GND 30
DATAR 29
13 28
14 LE/WS 27
15 OUT 16/18 26
16 25
17 LFS DPOL 24
18 SONY/12S
23
19 TEST 22
20 TEST TEST 21
–5V ANALOG
SUPPLY
+5V ANALOG
SUPPLY
AD1864
1 –VS
+VS 24
2 TRIM TRIM 23
3 MSB
MSB 22
4 I OUT
I OUT 21
5 AGND AGND 20
6 SJ
SJ 19
7 RF
8 VOUT
9 +VL
10 DR
R F 18
VOUT 17
–VL 16
DL 15
11 LR
LL 14
12 CLK DGND 13
RIGHT
LPF CHANNEL
OUTPUT
LEFT
LPF CHANNEL
OUTPUT
+5V DIGITAL
SUPPLY
–5V DIGITAL
SUPPLY
Figure 15. AD1864 with Sony CXD1244S Digital Filter
SM5818AP
(16-PIN DIP)
1 VDD 16
2 BCKO 15
3 WDCO 14
4 OMOD2 13
5 DOR 12
6 DOL 11
7 10
8 VSS OMOD1 9
–5V ANALOG
SUPPLY
+5V ANALOG
SUPPLY
AD1864
1 –VS
+VS 24
2 TRIM TRIM 23
3 MSB
MSB 22
4 I OUT
I OUT 21
5 AGND AGND 20
6 SJ
SJ 19
7 RF
8 VOUT
R F 18
VOUT 17
9 +VL
10 DR
–V L 16
DL 15
11 LR
LL 14
12 CLK DGND 13
RIGHT
LPF CHANNEL
OUTPUT
LEFT
LPF CHANNEL
OUTPUT
+5V DIGITAL
SUPPLY
–5V DIGITAL
SUPPLY
Figure 16. AD1864 with NPC SM5818AP Digital Filter
REV. A
–11–
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet AD1864.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| AD1860 | 18-Bit PCM Audio DAC | Analog Devices |
| AD1861 | 16-Bit/18-Bit/ 16 X Fs PCM Audio DACs | Analog Devices |
| AD1862 | Ultralow Noise 20-Bit Audio DAC | Analog Devices |
| AD1864 | Complete Dual 18-Bit Audio DAC | Analog Devices |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |