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PDF AD1816A Data sheet ( Hoja de datos )

Número de pieza AD1816A
Descripción SoundPort Controller
Fabricantes Analog Devices 
Logotipo Analog Devices Logotipo



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a
SoundPort® Controller
AD1816A
FEATURES
Compatible with Microsoft® PC 97 Logo Requirements
Supports Applications Written for Windows® 95,
Windows 3.1, Windows NT, SoundBlaster® Pro,
AdLib®/OPL3®
Stereo Audio 16-Bit ⌺⌬ Codec
Internal 3D Circuit—Phat™ Stereo Phase Expander
MPC Level-3 Mixer
ISA Plug and Play Compatible
16-Bit Address Decode
Dual Type F FIFO DMA Support
MPU-401 Compatible MIDI Port
Supports Wavetable Synthesizers
Integrated Enhanced Digital Game Port
Bidirectional DSP Serial Port
Two I2S Digital Audio Serial Ports
Integrated OPL3 Compatible Music Synthesizer
Software and Hardware Volume Control
Full-Duplex Capture and Playback Operation at
Different Sample Rates
Supports Up to Six Different Sample Rates Simultaneously
1 Hz Resolution Programmable Sample Rates from
4 kHz to 55.2 kHz
Power Management Modes
Operation from +5 V Supply
Built-In 24 mA Bus Drivers
100-Lead PQFP and TQFP Package
FUNCTIONAL BLOCK DIAGRAM
AD1816A
MIC
LINE
SYNTH
CD
VID
PHONE_IN
0dB/
20dB
Σ
L_OUT
PHONE_OUT
R_OUT
MV
MV
MV
Σ
Σ
AGC
HARDWARE
VOLUME
CONTROL
MODEM/
LOGICAL
DEVICE
CONTROL
E2PROM
CONTROL
SB PRO
REGISTER
MPU-401
GAME PORT
PGA
16-BIT
⌺⌬ A/D
CONVERTER
DSP SERIAL PORT
2
A
M
GGGGG
AAAAA
MMMMM
Σ ΣΣΣΣΣ
Σ
Σ Σ ΣΣΣΣ
G = GAIN
A = ATTENUATE
M = MUTE
MV = MASTER VOLUME
MA
Σ
16-BIT
⌺⌬ D/A
CONVERTER
Σ
MA
MA
MA
OSCILLATORS
2 MUSIC
SYNTHESIZER
2
2
I2S SERIAL PORT (0)
2
I2S SERIAL PORT (1)
SERIAL PORT
INTERFACE
DIGITAL PLL
DRQ (X)
IRQ (X)
PC_D (7:0)
PC_A (15:0)
AEN
DACK (X)
IOR
IOW
BCLK (0)
LRCLK (0)
SDATA (0)
BCLK (1)
LRCLK (1)
SDATA (1)
PCLKO
SoundPort is a registered trademark of Analog Devices, Inc.
Phat is a trademark of Analog Devices, Inc.
All other trademarks are the property of their respective holders.
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 1997

1 page




AD1816A pdf
DIGITAL MIX ATTENUATORS*
Parameter
Step Size: I2S (0), I2S (1), Music, ISA
Digital Mix Attenuation Range Span
ANALOG OUTPUT
Parameter
Full-Scale Output Voltage (at L_OUT, R_OUT, PHONE_OUT)
Output Impedance*
External Load Impedance*
Output Capacitance*
External Load Capacitance
VREFX*
VREFX Current Drive*
VREFX Output Impedance*
Master Volume Mute Click (Muted Analog Mixers), Muted
Output Minus Unmuted Output at 0 dB
SYSTEM SPECIFICATIONS*
Parameter
System Frequency Response Ripple (Line In to Line Out)
Differential Nonlinearity
Phase Linearity Deviation
STATIC DIGITAL SPECIFICATIONS
Parameter
High Level Input Voltage (VIH)
XTALI
Low Level Input Voltage (VIL)
High Level Output Voltage (VOH), IOH = 8 mA†
Low Level Output Voltage (VOL), IOL = 8 mA
Input Leakage Current
Output Leakage Current
POWER SUPPLY
Parameter
Power Supply Range—Analog
Power Supply Range—Digital
Power Supply Current
Power Dissipation
Analog Supply Current
Digital Supply Current
Analog Power Supply Current—Power-Down
Digital Power Supply Current—Power-Down
Analog Power Supply Current—RESET
Digital Power Supply Current—RESET
Power Supply Rejection (100 mV p-p Signal on Both Analog and Digital
Supply Pins, Measured at ADC and Line Outputs)
CLOCK SPECIFICATIONS*
Parameter
Input Clock Frequency
Recommended Clock Duty Cycle
Power-Up Initialization Time
REV. A
–5–
Min
Min
10
2.10
Min
Min
2
2.4
2.4
–10
–10
Min
4.75
4.75
Min
25
AD1816A
Typ
1.505
94.8
Max
Units
dB
dB
Typ Max
2.8
570
15
100
2.25 2.40
100
6.5
±5
Units
V p-p
k
pF
pF
V
µA
k
mV
Typ Max
1.0
±1
5
Units
dB
LSB
Degrees
Typ Max
0.8
0.4
+10
+10
Units
V
V
V
V
V
µA
µA
Typ Max
Units
5.25
5.25
221
1105
51
170
2
24
0.2
10
V
V
mA
mW
mA
mA
mA
mA
mA
mA
40 dB
Typ Max
33
50 75
500
Units
MHz
%
ms

5 Page





AD1816A arduino
AD1816A
PIN FUNCTION DESCRIPTIONS
Analog Signals (All Inputs must be AC-Coupled)
Pin Name
PQFP TQFP I/O Description
MIC
44 42
L_LINE
42 40
R_LINE
41 39
L_SYNTH 46 44
R_SYNTH 45 43
L_CD
48 46
R_CD
47 45
L_VID
32 30
R_VID
31 29
L_OUT
30
R_OUT
29
PHONE_IN 43
PHONE_OUT 28
RX3D
26
CX3D
27
28
27
41
26
24
25
I Microphone Input. The MIC input may be either line-level or –20 dB from line-level (the
difference being made up through a software controlled 20 dB gain block). The mono MIC
input may be sent to the left and right channel of the ADC for conversion, or gained/
attenuated from +12 dB to –34.5 dB in 1.5 dB steps and then summed with left and right
line OUT before the Master Volume stage.
I Left Line-Level Input. The left line-level input may be sent to the left channel of the ADC;
gained/attenuated from +12 dB to –34.5 dB in 1.5 dB steps and then summed with left line
OUT (L_OUT).
I Right Line-Level Input. The right line-level input may be sent to the right channel of the
ADC; gained/attenuated from +12 dB to –34.5 dB in 1.5 dB steps and then summed with
right line OUT (R_OUT).
I Left Synthesizer Input. The left MIDI upgrade line-level input may be sent to the left
channel of the ADC; gained/attenuated from +12 dB to –34.5 dB in 1.5 dB steps and then
summed with left line OUT (L_OUT).
I Right Synthesizer Input. The right MIDI upgrade line-level input may be sent to the right
channel of the ADC; gained/attenuated from +12 dB to –34.5 dB in 1.5 dB steps and then
summed with right line OUT (R_OUT).
I Left CD Line-Level Input. The left CD line-level input may be sent to the left channel of
the ADC; gained/attenuated from +12 dB to –34.5 dB in 1.5 dB steps and then summed
with left line OUT (L_OUT).
I Right CD Line-Level Input. The right CD line-level input may be sent to the right channel
of the ADC; gained/attenuated from +12 dB to –34.5 dB in 1.5 dB steps and then summed
with right line OUT (R_OUT).
I Left Video Input. The left audio track for a video line-level input may be sent to the left
channel of the ADC; gained/attenuated from +12 dB to –34.5 dB in 1.5 dB steps and then
summed with left line OUT (L_OUT).
I Right Video Input. The right audio track for a video line-level input may be sent to the
right channel of the ADC; gained/attenuated from +12 dB to –34.5 dB in 1.5 dB steps and
then summed with right line OUT (R_OUT).
O Left Output. Left channel line-level post-mixed output. The final stage passes through the
Master Volume block and may be attenuated 0 dB to –45 dB in 1.5 dB steps.
O Right Output. Right channel line-level post-mixed output. The final stage passes through
the Master Volume block and may be attenuated 0 dB to –45 dB in 1.5 dB steps.
I Phone Input. Line-level input from a DAA/modem chipset.
O Phone Output. Line-level output from a DAA/modem chipset.
O Phat Stereo Phase Expander filter network, resistor pin.
I Phat Stereo Phase Expander filter network, capacitor pin.
REV. A
–11–

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