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AD13280 Schematic ( PDF Datasheet ) - Analog Devices

Teilenummer AD13280
Beschreibung Dual Channel/ 12-Bit/ 80 MSPS A/D Converter with Analog Input Signal Conditioning
Hersteller Analog Devices
Logo Analog Devices Logo 




Gesamt 28 Seiten
AD13280 Datasheet, Funktion
FEATURES
Dual 80 MSPS, minimum sample rate
Channel-to-channel matching, ±1% gain error
90 dB channel-to-channel isolation
DC-coupled signal conditioning
80 dB spurious-free dynamic range
Selectable bipolar inputs (±1 V and ±0.5 V ranges)
Integral single-pole, low-pass Nyquist filter
Twos complement output format
3.3 V compatible outputs
1.85 W per channel
Dual-Channel, 12-Bit, 80 MSPS ADC
with Analog Input Signal Conditioning
AD13280
APPLICATIONS
Radar processing (optimized for I/Q baseband operation)
Phased array receivers
Multichannel, multimode receivers
GPS antijamming receivers
Communications receivers
PRODUCT HIGHLIGHTS
1. Guaranteed sample rate of 80 MSPS.
2. Input signal conditioning; gain and impedance match.
3. Single-ended, differential, or off-module filter option.
4. Fully tested/characterized full channel performance.
FUNCTIONAL BLOCK DIAGRAM
AMP-IN-A-2 AMP-IN-A-1
AMP-IN-B-2 AMP-IN-B-1
AMP-OUT-A
A–IN
A+IN
DROUTA
D0A (LSB)
D1A
D2A
D3A
D4A
D5A
D6A
D7A
D8A
AD13280
VREF
DROUT
9 12
100OUTPUT TERMINATORS
TIMING
3
ENCODEA ENCODEA D9A D10A D11A
(MSB)
VREF
DROUT
12
100OUTPUT TERMINATORS
7
TIMING
5
D0B D1B D2B D3B D4B D5B D6B
(LSB)
Figure 1.
AMP-OUT-B
B+IN
B–IN
DROUTB
ENCODEB
ENCODEB
D11B (MSB)
D10B
D9B
D8B
D7B
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2002–2008 Analog Devices, Inc. All rights reserved.






AD13280 Datasheet, Funktion
AD13280
Parameter
I (DVCC) Current
ICC (Total) Supply Current per Channel
Power Dissipation (Total)
Power Supply Rejection Ratio (PSRR)
Temperature
Full
Full
Full
Full
Test Level
I
I
I
V
Min
AD13280AZ
Typ
34
375
3.7
0.01
Max
46
459
4.3
Unit
mA
mA
W
% FSR/% VS
1 All ac specifications tested by driving ENCODE and ENCODE differentially. Single-ended input: AMP-IN-x-1 = 1 V p-p, AMP-IN-x-2 = GND.
2 Gain tests are performed on the AMP-IN-x-1 input voltage range.
3 Full power bandwidth is the frequency at which the spectral power of the fundamental frequency (as determined by FFT analysis) is reduced by 3 dB.
4 For differential input: +IN = 1 V p-p and −IN = 1 V p-p (signals are 180 Ω out of phase). For single-ended input: +IN = 2 V p-p and –IN = GND.
5 Minimum and maximum conversion rates allow for variation in encode duty cycle of 50% ± 5%.
6 Analog input signal power at –1 dBFS; signal-to-noise ratio (SNR) is the ratio of signal level to total noise (first five harmonics removed). Encode = 80 MSPS. SNR is
reported in dBFS, related back to converter full scale.
7 Analog input signal power at –1 dBFS; signal-to-noise and distortion (SINAD) is the ratio of signal level to total noise + harmonics. Encode = 80 MSPS. SINAD is
reported in dBFS, related back to converter full scale.
8 Analog input signal at –1 dBFS; SFDR is the ratio of converter full scale to worst spur.
9 Both input tones at –7 dBFS; two-tone intermodulation distortion (IMD) rejection is the ratio of either tone to the worst third-order intermodulation product.
10 Channel-to-channel isolation tested with A channel grounded and a full-scale signal applied to B channel.
11 Digital output logic levels: DVCC = 3.3 V, CLOAD = 10 pF. Capacitive loads >10 pF degrades performance.
12 Supply voltage recommended operating range. AVCC may be varied from 4.85 V to 5.25 V. However, rated ac (harmonics) performance is valid only over the range
AVCC = 5.0 V to 5.25 V.
TIMING DIAGRAM
tA
N
AIN
N+1
N+2
ENCODE,
ENCODE
D[11:0]
tENC
N
tENCH
N+1
N–3
tENCL
N+2
tE_DR
N–2
N+3
N+3
N–1
N+4
N+4
tOD
N
DRY
Figure 2.
Rev. C | Page 6 of 28

6 Page









AD13280 pdf, datenblatt
AD13280
TERMINOLOGY
Analog Bandwidth
The analog input frequency at which the spectral power of the
fundamental frequency (as determined by the FFT analysis) is
reduced by 3 dB.
Aperture Delay
The delay between a differential crossing of the ENCODEA
signal and the ENCODEA signal and the instant at which the
analog input is sampled.
Aperture Uncertainty (Jitter)
The sample-to-sample variation in aperture delay.
Differential Analog Input Resistance, Differential Analog
Input Capacitance, and Differential Analog Input Impedance
The real and complex impedances measured at each analog
input port. The resistance is measured statically, and the
capacitance and differential input impedances are measured
with a network analyzer.
Differential Analog Input Voltage Range
The peak-to-peak differential voltage that must be applied to
the converter to generate a full-scale response. Peak differential
voltage is computed by observing the voltage from the other
pin, which is 180 degrees out of phase. Peak-to-peak differential
is computed by rotating the input phase 180 degrees and taking
the peak measurement again. The difference is then computed
between both peak measurements.
Differential Nonlinearity
The deviation of any code from an ideal 1 LSB step.
ENCODE Pulse Width/Duty Cycle
Pulse width high is the minimum amount of time that the
ENCODE pulse should be left in a Logic 1 state to achieve the
rated performance. Pulse width low is the minimum time the
ENCODE pulse should be left in a low state. At a given clock
rate, these specifications define an acceptable encode duty cycle.
Harmonic Distortion
The ratio of the rms signal amplitude to the rms value of the
worst harmonic component.
Integral Nonlinearity
The deviation of the transfer function from a reference line
measured in fractions of 1 LSB using a best straight line
determined by a least square curve fit.
Minimum Conversion Rate
The encode rate at which the SNR of the lowest analog signal
frequency drops by no more than 3 dB below the guaranteed
limit.
Maximum Conversion Rate
The encode rate at which parametric testing is performed.
Output Propagation Delay
The delay between a differential crossing of the ENCODEA
signal and the ENCODEA signal and the time at which all
output data bits are within valid logic levels.
Overvoltage Recovery Time
The amount of time required for the converter to recover to
0.02% accuracy after an analog input signal of the specified
percentage of full scale is reduced to midscale.
Power Supply Rejection Ratio
The ratio of a change in input offset voltage to a change in
power supply voltage.
Signal-to-Noise-and-Distortion (SINAD)
The ratio of the rms signal amplitude (set at 1 dB below full
scale) to the rms value of the sum of all other spectral compo-
nents, including harmonics but excluding dc. SINAD can be
reported in dB (that is, degrades as signal level is lowered) or
in dBFS (always related back to converter full scale).
Signal-to-Noise Ratio (SNR) (Without Harmonics)
The ratio of the rms signal amplitude (set at 1 dB below full
scale) to the rms value of the sum of all other spectral com-
ponents, excluding the first five harmonics and dc. SNR can be
reported in dB (that is, degrades as signal level is lowered) or
in dBFS (always related back to converter full scale).
Spurious-Free Dynamic Range (SFDR)
The ratio of the rms signal amplitude to the rms value of
the peak spurious spectral component. The peak spurious
component may or may not be a harmonic.
Transient Response
The time required for the converter to achieve 0.02% accuracy
when a one-half full-scale step function is applied to the analog
input.
Two-Tone Intermodulation Distortion Rejection
The ratio of the rms value of either input tone to the rms value
of the worst third-order intermodulation product; reported in
dBc.
Rev. C | Page 12 of 28

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