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ACTS573KTR-02 Schematic ( PDF Datasheet ) - Intersil Corporation

Teilenummer ACTS573KTR-02
Beschreibung Radiation Hardened Octal Three-State Transparent Latch
Hersteller Intersil Corporation
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Gesamt 3 Seiten
ACTS573KTR-02 Datasheet, Funktion
Data Sheet
ACTS573T
July 1999 File Number 4613.1
Radiation Hardened Octal Three-State
Transparent Latch
Intersil’s Satellite Applications FlowTM (SAF) devices are fully
tested and guaranteed to 100kRAD total dose. These QML
Class T devices are processed to a standard flow intended
to meet the cost and shorter lead-time needs of large
volume satellite manufacturers, while maintaining a high
level of reliability.
The Intersil ACTS573T is a Radiation Hardened Octal
Transparent Latch with an active low output enable. The
outputs are transparent to the inputs when the latch enable
(LE) is High. When the latch goes low the data is latched.
The output enable controls the three-state outputs. When
the output enable pins (OE) are high the output is in a high
impedance state. The latch operation is independent of the
state of output enable.
Specifications
Specifications for Rad Hard QML devices are controlled by
the Defense Supply Center in Columbus (DSCC). The SMD
numbers listed below must be used when ordering.
Detailed Electrical Specifications for the ACTS573T are
contained in SMD 5962-96725. A “hot-link” is provided from
our website for downloading.
www.intersil.com/spacedefense/newsafclasst.asp
Intersil’s Quality Management Plan (QM Plan), listing all
Class T screening operations, is also available on our
website.
www.intersil.com/quality/manuals.asp
Ordering Information
ORDERING
INFORMATION
PART
NUMBER
TEMP.
RANGE
(oC)
5962R9672502TRC
ACTS573DTR-02
-55 to 125
5962R9672502TXC
ACTS573KTR-02
-55 to 125
NOTE: Minimum order quantity for -T is 150 units through
distribution, or 450 units direct.
Features
• QML Class T, Per MIL-PRF-38535
• Radiation Performance
- Gamma Dose (γ) 1 x 105 RAD(Si)
- Latch-Up Free Under Any Conditions
- Single Event Upset (SEU) Immunity: <1 x 10-10
Errors/Bit/Day (Typ)
- SEU LET Threshold . . . . . . . . . . . . .>100 MEV-cm2/mg
• 1.25 Micron Radiation Hardened SOS CMOS
• Significant Power Reduction Compared to ALSTTL Logic
• DC Operating Voltage Range . . . . . . . . . . . . 4.5V to 5.5V
• Input Logic Levels
- VIL = 0.8V Max
- VIH = VCC/2 Min
• Fast Propagation Delay . . . . . . . . 18ns (Max), 12ns (Typ)
Pinouts
ACTS573T (SBDIP), CDIP2-T20
TOP VIEW
OE 1
D0 2
D1 3
D2 4
D3 5
D4 6
D5 7
D6 8
D7 9
GND 10
20 VCC
19 Q0
18 Q1
17 Q2
16 Q3
15 Q4
14 Q5
13 Q6
12 Q7
11 LE
ACTS573T (FLATPACK), CDFP4-F20
TOP VIEW
OE
D0
D1
D2
D3
D4
D5
D6
D7
GND
1
2
3
4
5
6
7
8
9
10
20 VCC
19 Q0
18 Q1
17 Q2
16 Q3
15 Q4
14 Q5
13 Q6
12 Q7
11 LE
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999





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