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PDF ACT-SF512K32N-26P1I Data sheet ( Hoja de datos )
| Número de pieza | ACT-SF512K32N-26P1I | |
| Descripción | ACT-SF512K32 High Speed 512Kx32 SRAM / 512Kx32 Flash Multichip Module | |
| Fabricantes | Aeroflex Circuit Technology | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de ACT-SF512K32N-26P1I (archivo pdf) en la parte inferior de esta página. Total 11 Páginas | ||
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ACT-SF512K32 High Speed
512Kx32 SRAM / 512Kx32 Flash
Multichip Module
CIRCUIT TECHNOLOGY
FEATURES
www.aeroflex.com
s 4 – 512K x 8 SRAMs & 4 – 512K x 8 Flash Die in
One MCM
s Access Times of 25ns, 35ns (SRAM) and
60ns, 70ns, 90ns (Flash)
s Organized as 512K x 32 of SRAM and 512K x 32
of Flash Memory with Common Data Bus
s Low Power CMOS
FLASH MEMORY FEATURES
s Sector Architecture (Each Die)
q 8 Equal Sectors of 64K bytes each
q Any combination of sectors can be erased with one
command sequence
s +5V Programing, +5V Supply
s Embedded Erase and Program Algorithms
s Input and Output TTL Compatible Design
s Hardware and Software Write Protection
s MIL-PRF-38534 Compliant MCMs Available
s Page Program Operation and Internal Program
s Decoupling Capacitors and Multiple Grounds for Control Time.
Low Noise
s 10,000 Erase/Program Cycles
s Commercial, Industrial and Military Temperature
Ranges
s Industry Standard Pinouts
s TTL Compatible Inputs and Outputs
s Packaging – Hermetic Ceramic
q 66–Lead, PGA-Type, 1.385"SQ x 0.245"max,
Aeroflex code# "P1,P5 with/without shoulders)"
q 68–Lead, Dual-Cavity CQFP(F2), 0.88"SQ x
.20"max (.18 max thickness available, contact
factory for details) (Drops into the 68 Lead
JEDEC .99"SQ CQFJ footprint)
FLEX LA
ISO
9001
CE R T I F I E D
Block Diagram – PGA Type Package(P1 & P5) & CQFP(F2)
OE
A0–A18
SCE
FCS
FWE1 SWE1
FWE2 SWE2
FWE3 SWE3
FWE4 SWE4
512K X 8 FLASH
512K X 8 SRAM
512K X 8 FLASH
512K X 8 SRAM
512K X 8 FLASH
512K X 8 SRAM
512K X 8 FLASH
512K X 8 SRAM
I/O0-7
I/O8-15
I/O16-23
I/O24-31
PIN DESCRIPTION
I/O0-31
Data I/O
A0–18
Address Inputs
FWE1-4 Flash Write Enables
SWE1-4 SRAM Write Enables
FCE Flash Chip Enable
SCE SRAM Chip Enable
OE Output Enable
NC Not Connected
VCC Power Supply
GND
Ground
eroflex Circuit Technology - Advanced Multichip Modules © SCD3852 REV A 5/20/98
1 page  
Flash AC Characteristics – Read Only Operations
(Vcc = 5.0V, Vss = 0V, Tc = -55°C to +125°C)
Parameter
Symbol
–60 –70 –90
Units
JEDEC Stand’d Min Max Min Max Min Max
Read Cycle Time
Address Access Time
Chip Enable Access Time
Output Enable to Output Valid
Chip Enable to Output High Z (1)
Output Enable High to Output High Z(1)
Output Hold from Address, CE or OE Change, Whichever is First
tAVAV
tAVQV
tELQV
tGLQV
tEHQZ
tGHQZ
tAXQX
tRC 60 70 90
ns
tACC 60 70 90 ns
tCE 60 70 90 ns
tOE 30 35 35 ns
tDF 20 20 20 ns
tDF 20 20 20 ns
tOH 0 0 0
ns
Note 1. Guaranteed by design, but not tested
Flash AC Characteristics – Write / Erase / Program Operations, FWE Controlled
(Vcc = 5.0V, Vss = 0V, Tc = -55°C to +125°C)
Parameter
Symbol
–60 –70 –90
Units
JEDEC Stand’d Min Max Min Max Min Max
Write Cycle Time
Chip Enable Setup Time
Write Enable Pulse Width
Address Setup Time
Data Setup Time
Data Hold Time
Address Hold Time
Write Enable Pulse Width High
Duration of Byte Programming Operation
Sector Erase Time
Read Recovery Time before Write
Vcc Setup Time
Chip Programming Time
Chip Enable Hold Time
Chip Erase Time
tAVAC
tELWL
tWLWH
tAVWL
tDVWH
tWHDX
tWLAX
tWHWL
tWHWH1
tWHWH2
tGHWL
tWHWH3
tWC
tCE
tWP
tAS
tDS
tDH
tAH
tWPH
tVCE
tOEH 1
60 70 90
000
40 45 45
000
40 45 45
000
45 45 45
20 20 20
14 TYP 14 TYP 14 TYP
30 30 30
000
50 50 50
50 50 50
10 10 10
120 120 120
ns
ns
ns
ns
ns
ns
ns
ns
µs
Sec
µs
µs
Sec
ns
Sec
1. Toggle and Data Polling only.
Flash AC Characteristics – Write / Erase / Program Operations, FCE Controlled
(Vcc = 5.0V, Vss = 0V, Tc = -55°C to +125°C)
Parameter
Symbol
–60 –70 –90
Units
JEDEC Stand’d Min Max Min Max Min Max
Write Cycle Time
tAVAC
tWC 60
70
90
ns
Write Enable Setup Time
tWLEL
tWS 0
0
0
ns
Chip Enable Pulse Width
tELEH
tCP 40
45
45
ns
Address Setup Time
tAVEL
tAS 0
0
0
ns
Data Setup Time
tDVEH
tDS 40
45
45
ns
Data Hold Time
tEHDX
tDH 0
0
0
ns
Address Hold Time
tELAX
tAH 45
45
45
ns
Chip Enable Pulse Width High
tEHEL
tCPH
20
20
20
ns
Duration of Byte Programming
tWHWH1
14 TYP 14 TYP 14 TYP µs
Sector Erase Time
Read Recovery Time
tWHWH2
tGHEL
30 30 30
000
Sec
ns
Chip Programming Time
50 50 50 Sec
Chip Erase Time
tWHWH3
120 120 120 Sec
Aeroflex Circuit Technology
5 SCD3852 REV A 5/20/98 Plainview NY (516) 694-6700
5 Page 
CIRCUIT TECHNOLOGY
Ordering Information
Model Number
DESC Part Number
Speed
ACT-SF512K32N–26P1X
TBD
25(S) / 60(F) ns
ACT-SF512K32N–37P1X
TBD
35(S) / 70(F) ns
ACT-SF512K32N–39P1X
TBD
35(S) / 90(F) ns
ACT-SF512K32N–26F2X
TBD
25S) / 60(F) ns
ACT-SF512K32N–37F2X
TBD
35(S) / 70(F) ns
ACT-SF512K32N–39F2X
Note: (S) = Speed for SRAM, (F) = Speed for FLASH
TBD
35(S) / 90(F) ns
Package
1.385"sq PGA-Type
1.385"sq PGA-Type
1.385"sq PGA-Type
.88"sq CQFP
.88"sq CQFP
.88"sq CQFP
Part Number Breakdown
ACT– SF 512K 32 N– 26 P1 M
Aeroflex Circuit
Technology
Memory Type
SF = SRAM Flash Combo Module
Memory Depth, Locations
Memory Width, Bits
Screening
C = Commercial Temp, 0°C to +70°C
I = Industrial Temp, -40°C to +85°C
T = Military Temp, -55°C to +125°C
M = Military Temp, -55°C to +125°C Screened *
Q = MIL-PRF-38534 Compliant/SMD
Pinout Options
N = None
Memory Speed (Code)
26 = 25ns SRAM / 60ns FLASH
37 = 35ns SRAM / 70ns FLASH
39 = 35ns SRAM / 90ns FLASH
Package Types & Sizes
Surface Mount Packages
F2 = 0.88"SQ 68 Leads Dual-Cavity CQFP
Thru-Hole Packages
P1 = 1.385"SQ PGA 66 Pins W/Shoulder
P5 = 1.385"SQ PGA 66 Pins WO/Shoulder
* Screened to the individual test methods of MIL-STD-883
Aeroflex Circuit Technology
35 South Service Road
Plainview New York 11830
Aeroflex Circuit Technology
Telephone: (516) 694-6700
FAX:
(516) 694-6715
Toll Free Inquiries: 1-(800) 843-1553
11 SCD3852 REV A 5/20/98 Plainview NY (516) 694-6700
11 Page | ||
| Páginas | Total 11 Páginas | |
| PDF Descargar | [ Datasheet ACT-SF512K32N-26P1I.PDF ] | |
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