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AD574 Schematic ( PDF Datasheet ) - Analog Devices

Teilenummer AD574
Beschreibung Complete 12-Bit A/D Converter
Hersteller Analog Devices
Logo Analog Devices Logo 




Gesamt 12 Seiten
AD574 Datasheet, Funktion
a
Complete
12-Bit A/D Converter
FEATURES
Complete 12-Bit A/D Converter with Reference
and Clock
8- and 16-Bit Microprocessor Bus Interface
Guaranteed Linearity Over Temperature
0؇C to +70؇C – AD574AJ, K, L
–55؇C to +125؇C – AD574AS, T, U
No Missing Codes Over Temperature
35 s Maximum Conversion Time
Buried Zener Reference for Long-Term Stability
and Low Gain T.C. 10 ppm/؇C max AD574AL
12.5 ppm/؇C max AD574AU
Ceramic DIP, Plastic DIP or PLCC Package
Available in Higher Speed, Pinout-Compatible Versions
(15 s AD674B, 80 s AD774B; 10 s (with SHA) AD1674)
Available in Versions Compliant with MIL-STD-883 and
JAN QPL
AD574A*
BLOCK DIAGRAM AND
PIN CONFIGURATION
+5V SUPPLY
VLOGIC
1
28
STATUS
STS
DATA MODE SELECT 2
12/8
MSB
N
27
DB11
MSB
CHIP SELECT
CS
BYTE ADDRESS/
SHORT CYCLE
AO
3
4
CONTROL
I
3
B
B
S
T
L
E
26 DB10
25 DB9
READ/CONVERT 5
R/C
CLOCK
SAR
12 A A 24 DB8
T
CHIP ENABLE
CE
+12/+15V SUPPLY
VCC
+10V REFERENCE
REF OUT
ANALOG COMMON
AC
6
7
8
9
3k
10V
REF
COMP 12
IDAC
IDAC =
4 x N x IREF
EN
O
U
T
P
U
I
B
B
L
E
TB
B
23 DB7
22 DB6
21 DB5
20 DB4
DIGITAL
DATA
OUTPUTS
REFERENCE INPUT 10
REF IN
19.95k
-12/-15V SUPPLY
VEE
BIPOLAR OFFSET
BIP OFF
10V SPAN INPUT
10VIN
20V SPAN INPUT
20VIN
11
12
13
14
9.95k
5k
5k
IREF
DAC N
AD574A 12
8k
VEE
UN
FI
FB
EB
RL
SE
C
LSB
19 DB3
18 DB2
17 DB1
16
DB0
LSB
15
DIGITAL COMMON
DC
PRODUCT DESCRIPTION
The AD574A is a complete 12-bit successive-approximation
analog-to-digital converter with 3-state output buffer circuitry
for direct interface to an 8- or 16-bit microprocessor bus. A high
precision voltage reference and clock are included on-chip, and
the circuit guarantees full-rated performance without external
circuitry or clock signals.
The AD574A design is implemented using Analog Devices’
Bipolar/I2L process, and integrates all analog and digital func-
tions on one chip. Offset, linearity and scaling errors are mini-
mized by active laser-trimming of thin-film resistors at the wafer
stage. The voltage reference uses an implanted buried Zener for
low noise and low drift. On the digital side, I2L logic is used for
the successive-approximation register, control circuitry and
3-state output buffers.
The AD574A is available in six different grades. The AD574AJ,
K, and L grades are specified for operation over the 0°C to
+70°C temperature range. The AD574AS, T, and U are speci-
fied for the –55°C to +125°C range. All grades are available in a
28-pin hermetically-sealed ceramic DIP. Also, the J, K, and L
grades are available in a 28-pin plastic DIP and PLCC, and the
J and K grades are available in ceramic LCC.
The S, T, and U grades in ceramic DIP or LCC are available
with optional processing to MIL-STD-883C Class B; the T
and U grades are available as JAN QPL. The Analog Devices’
Military Products Databook should be consulted for details on
/883B testing of the AD574A.
*Protected by U.S. Patent Nos. 3,803,590; 4,213,806; 4,511,413; RE 28,633 .
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
PRODUCT HIGHLIGHTS
1. The AD574A interfaces to most 8- or 16-bit microproces-
sors. Multiple-mode three-state output buffers connect di-
rectly to the data bus while the read and convert commands
are taken from the control bus. The 12 bits of output data
can be read either as one 12-bit word or as two 8-bit bytes
(one with 8 data bits, the other with 4 data bits and 4 trailing
zeros).
2. The precision, laser-trimmed scaling and bipolar offset resis-
tors provide four calibrated ranges: 0 volts to +10 volts and 0
volts to +20 volts unipolar, –5 volts to +5 volts and –10 volts
to +10 volts bipolar. Typical bipolar offset and full-scale cali-
bration errors of ± 0.1% can be trimmed to zero with one ex-
ternal component each.
3. The internal buried Zener reference is trimmed to 10.00
volts with 0.2% maximum error and 15 ppm/°C typical T.C.
The reference is available externally and can drive up to
1.5 mA beyond the requirements of the reference and bipolar
offset resistors.
4. AD674B (15 µs) and AD774B (8 µs) provide higher speed,
pin compatibility; AD1674 (10 µs) includes on-chip Sample-
Hold Amplifier (SHA).
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
Fax: 617/326-8703






AD574 Datasheet, Funktion
AD574A
CIRCUIT OPERATION
The AD574A is a complete 12-bit A/D converter which requires
no external components to provide the complete successive-
approximation analog-to-digital conversion function. A block
diagram of the AD574A is shown in Figure 1.
+5V SUPPLY
VLOGIC
1
28
STATUS
STS
DATA MODE SELECT 2
12/8
MSB
N
27
DB11
MSB
CHIP SELECT
CS
BYTE ADDRESS/
SHORT CYCLE
AO
3
4
CONTROL
I
3
B
B
S
T
L
E
26 DB10
25 DB9
READ/CONVERT 5
R/C
CLOCK
SAR
12 A A 24 DB8
T
CHIP ENABLE
CE
+12/+15V SUPPLY
VCC
+10V REFERENCE
REF OUT
ANALOG COMMON
AC
6
7
8
9
3k
10V
REF
COMP 12
IDAC
IDAC =
4 x N x IREF
E
N
OI
UB
TB
PL
UE
TB
B
23 DB7
22 DB6
21 DB5
20 DB4
DIGITAL
DATA
OUTPUTS
REFERENCE INPUT 10
REF IN
19.95k
-12/-15V SUPPLY
VEE
BIPOLAR OFFSET
BIP OFF
10V SPAN INPUT
10VIN
20V SPAN INPUT
20VIN
11
12
13
14
9.95k
5k
5k
IREF
DAC N
AD574A 12
8k
VEE
UN
FI
FB
EB
RL
SE
C
LSB
19 DB3
18 DB2
17 DB1
16
DB0
LSB
15
DIGITAL COMMON
DC
Figure 1. Block Diagram of AD574A 12-Bit A-to-D Converter
When the control section is commanded to initiate a conversion
(as described later), it enables the clock and resets the successive-
approximation register (SAR) to all zeros. Once a conversion
cycle has begun, it cannot be stopped or restarted and data is
not available from the output buffers. The SAR, timed by the
clock, will sequence through the conversion cycle and return an
end-of-convert flag to the control section. The control section
will then disable the clock, bring the output status flag low, and
enable control functions to allow data read functions by external
command.
During the conversion cycle, the internal 12-bit current output
DAC is sequenced by the SAR from the most significant bit
(MSB) to least significant bit (LSB) to provide an output cur-
rent which accurately balances the input signal current through
the 5 k(or 10 k) input resistor. The comparator determines
whether the addition of each successively-weighted bit current
causes the DAC current sum to be greater or less than the input
current; if the sum is less, the bit is left on; if more, the bit is
turned off. After testing all the bits, the SAR contains a 12-bit
binary code which accurately represents the input signal to
within ± 1/2 LSB.
The temperature-compensated buried Zener reference provides
the primary voltage reference to the DAC and guarantees excel-
lent stability with both time and temperature. The reference is
trimmed to 10.00 volts ± 0.2%; it can supply up to 1.5 mA to an
external load in addition to the requirements of the reference in-
put resistor (0.5 mA) and bipolar offset resistor (1 mA) when
the AD574A is powered from ± 15 V supplies. If the AD574A is
used with ± 12 V supplies, or if external current must be sup-
plied over the full temperature range, an external buffer ampli-
fier is recommended. Any external load on the AD574A
reference must remain constant during conversion. The
thin-film application resistors are trimmed to match the
full-scale output current of the DAC. There are two 5 kinput
scaling resistors to allow either a 10 volt or 20 volt span. The
10 kbipolar offset resistor is grounded for unipolar operation
and connected to the 10 volt reference for bipolar operation.
DRIVING THE AD574 ANALOG INPUT
The internal circuitry of the AD574 dictates that its analog
input be driven by a low source impedance. Voltage changes at
the current summing node of the internal comparator result in
abrupt modulations of the current at the analog input. For accu-
rate 12-bit conversions the driving source must be capable of
holding a constant output voltage under these dynamically
changing load conditions.
FEEDBACK TO AMPLIFIER
V+
CURRENT
LIMITING
RESISTORS
RIN
IIN IS MODULATED BY
iDIFF
CHANGES IN TEST CURRENT.
AMPLIFIER PULSE LOAD
RESPONSE LIMITED BY
V– OPEN LOOP OUTPUT IMPEDANCE.
ANALOG COMMON
AD574A
IIN
iTEST
CURRENT
OUTPUT
DAC
COMPARATOR
SAR
Figure 2. Op Amp – AD574A Interface
The output impedance of an op amp has an open-loop value
which, in a closed loop, is divided by the loop gain available at
the frequency of interest. The amplifier should have acceptable
loop gain at 500 kHz for use with the AD574A. To check
whether the output properties of a signal source are suitable,
monitor the AD574’s input with an oscilloscope while a conver-
sion is in progress. Each of the 12 disturbances should subside
in 1 µs or less.
For applications involving the use of a sample-and-hold ampli-
fier, the AD585 is recommended. The AD711 or AD544 op
amps are recommended for dc applications.
SAMPLE-AND-HOLD AMPLIFIERS
Although the conversion time of the AD574A is a maximum of
35 µs, to achieve accurate 12-bit conversions of frequencies
greater than a few Hz requires the use of a sample-and-hold
amplifier (SHA). If the voltage of the analog input signal driving
the AD574A changes by more than 1/2 LSB over the time
interval needed to make a conversion, then the input requires a
SHA.
The AD585 is a high linearity SHA capable of directly driving
the analog input of the AD574A. The AD585’s fast acquisition
time, low aperture and low aperture jitter are ideally suited for
high-speed data acquisition systems. Consider the AD574A
converter with a 35 µs conversion time and an input signal of
10 V p-p: the maximum frequency which may be applied to
achieve rated accuracy is 1.5 Hz. However, with the addition of
an AD585, as shown in Figure 3, the maximum frequency
increases to 26 kHz.
The AD585’s low output impedance, fast-loop response, and
low droop maintain 12-bits of accuracy under the changing load
conditions that occur during a conversion, making it suitable for
use in high accuracy conversion systems. Many other SHAs
cannot achieve 12-bits of accuracy and can thus compromise a
system. The AD585 is recommended for AD574A applications
requiring a sample and hold.
An alternate approach is to use the AD1674, which combines
the ADC and SHA on one chip, with a total throughput time of
10 µs.
–6– REV. B

6 Page









AD574 pdf, datenblatt
AD574A
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
28-Pin Ceramic DIP Package (D-28)
28-Lead Plastic DIP Package (N-28A)
28-Terminal PLCC Package (P-28A)
0.180 (4.57)
0.048 (1.21)
0.165 (4.19)
0.042 (1.07)
0.048 (1.21)
0.042 (1.07)
4
5 PIN 1
IDENTIFIER
0.056 (1.42)
0.042 (1.07)
26
25
TOP VIEW
(PINS DOWN)
0.050
(1.27)
BSC
0.020
(0.50)
R
11
12
19
18
0.456 (11.58)
0.450 (11.43) SQ
0.495 (12.57)
0.485 (12.32) SQ
0.025 (0.63)
0.015 (0.38)
0.021 (0.53)
0.013 (0.33)
0.430 (10.92)
0.390 (9.91)
0.032 (0.81)
0.026 (0.66)
0.040 (1.01)
0.025 (0.64)
0.110 (2.79)
0.085 (2.16)
0.075
(1.91)
REF
28–Terminal LCC Package (E-28A)
0.458 (11.63)
SQ
0.442 (11.23)
0.075 (1.91) REF
TOP VIEW
0.100 (2.54)
0.064 (1.63)
0.150 (3.81) BSC
0.095 (2.41)
0.075 (1.90)
0.458
(11.63)
MAX
SQ
0.011 (0.28)
0.007 (0.18)
R TYP
0.300 (7.62) BSC
28
1
BOTTOM
VIEW
0.055 (1.40)
0.045 (1.14)
0.088 (2.24)
0.054 (1.37)
18
12
0.200
(5.08)
BSC
0.015 (0.38)
MIN
0.028 (0.71)
0.022 (0.56)
0.050
(1.27)
BSC
45°
TYP
–12–
REV. B

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