AD5324 Datasheet PDF - Analog Devices
| Part Number | AD5324 | |
| Description | 2.5 V to 5.5 V/ 500 uA/ Quad Voltage Output 8-/10-/12-Bit DACs in 10-Lead microSOIC | |
| Manufacturers | Analog Devices | |
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a 2.5 V to 5.5 V, 500 A, Quad Voltage Output
8-/10-/12-Bit DACs in 10-Lead microSOIC
AD5304/AD5314/AD5324*
FEATURES
AD5304
Four Buffered 8-Bit DACs in 10-Lead microSOIC
AD5314
Four Buffered 10-Bit DACs in 10-Lead microSOIC
AD5324
Four Buffered 12-Bit DACs in 10-Lead microSOIC
Low Power Operation: 500 A @ 3 V, 600 A @ 5 V
2.5 V to 5.5 V Power Supply
Guaranteed Monotonic By Design Over All Codes
Power-Down to 80 nA @ 3 V, 200 nA @ 5 V
Double-Buffered Input Logic
Output Range: 0–VREF
Power-On-Reset to Zero Volts
Simultaneous Update of Outputs (LDAC Function)
Low Power, SPI™, QSPI™, MICROWIRE™, and
DSP-Compatible 3-Wire Serial Interface
On-Chip Rail-to-Rail Output Buffer Amplifiers
Temperature Range –40؇C to +105؇C
APPLICATIONS
Portable Battery-Powered Instruments
Digital Gain and Offset Adjustment
Programmable Voltage and Current Sources
Programmable Attenuators
Industrial Process Control
GENERAL DESCRIPTION
The AD5304/AD5314/AD5324 are quad 8-, 10- and 12-bit
buffered voltage output DACs in a 10-lead microSOIC package
that operate from a single 2.5 V to 5.5 V supply consuming
500 µA at 3 V. Their on-chip output amplifiers allow rail-to-
rail output swing to be achieved with a slew rate of 0.7 V/µs.
A 3-wire serial interface is used which operates at clock rates
up to 30 MHz and is compatible with standard SPI, QSPI,
MICROWIRE and DSP interface standards.
The references for the four DACs are derived from one reference
pin. The outputs of all DACs may be updated simultaneously
using the software LDAC function. The parts incorporate a
power-on-reset circuit that ensures that the DAC outputs power
up to zero volts and remain there until a valid write takes place
to the device. The parts contain a power-down feature that
reduces the current consumption of the device to 200 nA @ 5 V
(80 nA @ 3 V).
The low power consumption of these parts in normal operation
makes them ideally suited to portable battery-operated equipment.
The power consumption is 3 mW at 5 V, 1.5 mW at 3 V, reducing
to 1 µW in power-down mode.
FUNCTIONAL BLOCK DIAGRAM
LDAC
VDD
REFIN
INPUT
REGISTER
DAC
REGISTER
STRING BUFFER
DAC A
VOUTA
SCLK
SYNC
DIN
INTERFACE
LOGIC
INPUT
REGISTER
DAC
REGISTER
STRING
DAC B
BUFFER
INPUT
REGISTER
DAC
REGISTER
STRING
DAC C
BUFFER
VOUTB
VOUTC
INPUT
REGISTER
DAC
REGISTER
STRING
DAC D
BUFFER
VOUTD
POWER-DOWN
POWER-ON
RESET
AD5304/AD5314/AD5324
LOGIC
GND
*Protected by U.S. Patent No. 5,969,657; other patents pending.
SPI and QSPI are trademarks of Motorola, Inc.
MICROWIRE is a trademark of National Semiconductor Corporation.
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2000
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AD5304/AD5314/AD5324
TERMINOLOGY
RELATIVE ACCURACY
For the DAC, relative accuracy or integral nonlinearity (INL) is
a measure of the maximum deviation, in LSBs, from a straight
line passing through the endpoints of the DAC transfer function.
Typical INL versus Code plots can be seen in Figures 4, 5, and 6.
DIFFERENTIAL NONLINEARITY
Differential Nonlinearity (DNL) is the difference between the
measured change and the ideal 1 LSB change between any two
adjacent codes. A specified differential nonlinearity of ± 1 LSB
maximum ensures monotonicity. This DAC is guaranteed mono-
tonic by design. Typical DNL versus Code plots can be seen in
Figures 7, 8, and 9.
DIGITAL CROSSTALK
This is the glitch impulse transferred to the output of one DAC
at midscale in response to a full-scale code change (all 0s to all
1s and vice versa) in the input register of another DAC. It is
expressed in nV-secs.
DAC-TO-DAC CROSSTALK
This is the glitch impulse transferred to the output of one DAC
due to a digital code change and subsequent output change of
another DAC. This includes both digital and analog crosstalk. It
is measured by loading one of the DACs with a full-scale code
change (all 0s to all 1s and vice versa) with the LDAC bit set low
and monitoring the output of another DAC. The energy of the
glitch is expressed in nV-secs.
OFFSET ERROR
This is a measure of the offset error of the DAC and the output
amplifier. It is expressed as a percentage of the full-scale range.
GAIN ERROR
This is a measure of the span error of the DAC. It is the devia-
tion in slope of the actual DAC transfer characteristic from the
ideal expressed as a percentage of the full-scale range.
OFFSET ERROR DRIFT
This is a measure of the change in offset error with changes in
temperature. It is expressed in (ppm of full-scale range)/°C.
GAIN ERROR DRIFT
This is a measure of the change in gain error with changes in
temperature. It is expressed in (ppm of full-scale range)/°C.
POWER-SUPPLY REJECTION RATIO (PSRR)
This indicates how the output of the DAC is affected by changes
in the supply voltage. PSRR is the ratio of the change in VOUT to
a change in VDD for full-scale output of the DAC. It is measured
in dBs. VREF is held at 2 V and VDD is varied ± 10%.
DC CROSSTALK
This is the dc change in the output level of one DAC at midscale
in response to a full-scale code change (all 0s to all 1s and vice
versa) and output change of another DAC. It is expressed in µV.
REFERENCE FEEDTHROUGH
This is the ratio of the amplitude of the signal at the DAC
output to the reference input when the DAC output is not being
updated. It is expressed in dBs.
MULTIPLYING BANDWIDTH
The amplifiers within the DAC have a finite bandwidth. The
multiplying bandwidth is a measure of this. A sine wave on the
reference (with full-scale code loaded to the DAC) appears on
the output. The multiplying bandwidth is the frequency at which
the output amplitude falls to 3 dB below the input.
TOTAL HARMONIC DISTORTION
This is the difference between an ideal sine wave and its attenuated
version using the DAC. The sine wave is used as the reference
for the DAC and the THD is a measure of the harmonics present
on the DAC output. It is measured in dBs.
OUTPUT
VOLTAGE
IDEAL
GAIN ERROR
PLUS
OFFSET ERROR
ACTUAL
NEGATIVE
OFFSET
ERROR
DAC CODE
AMPLIFIER
FOOTROOM
(1mV)
NEGATIVE
OFFSET
ERROR
DEADBAND CODES
Figure 2. Transfer Function with Negative Offset
MAJOR-CODE TRANSITION GLITCH ENERGY
Major-code transition glitch energy is the energy of the impulse
injected into the analog output when the code in the DAC
register changes state. It is normally specified as the area of the
glitch in nV-secs and is measured when the digital code is changed
by 1 LSB at the major carry transition (011 . . . 11 to 100 . . . 00
or 100 . . . 00 to 011 . . . 11).
DIGITAL FEEDTHROUGH
Digital feedthrough is a measure of the impulse injected into the
analog output of the DAC from the digital input pins of the device
when the DAC output is not being written to (SYNC held high). It
is specified in nV-secs and is measured with a worst-case change on
the digital input pins, e.g., from all 0s to all 1s or vice versa.
REV. B
–5–
OUTPUT
VOLTAGE
ACTUAL
GAIN ERROR
PLUS
OFFSET ERROR
IDEAL
POSITIVE
OFFSET
DAC CODE
Figure 3. Transfer Function with Positive Offset
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Part DetailsOn this page, you can learn information such as the schematic, equivalent, pinout, replacement, circuit, and manual for AD5324 electronic component. |
| Information | Total 15 Pages | |
| Link URL | [ Copy URL to Clipboard ] | |
| Download | [ AD5324.PDF Datasheet ] | |
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