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PDF AD5306 Data sheet ( Hoja de datos )
| Número de pieza | AD5306 | |
| Descripción | 8-/10-/12-Bit DACs | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de AD5306 (archivo pdf) en la parte inferior de esta página. Total 24 Páginas | ||
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2.5 V to 5.5 V, 400 μA, 2-Wire Interface,
Quad Voltage Output, 8-/10-/12-Bit DACs
AD5306/AD5316/AD5326
FEATURES
AD5306: 4 buffered, 8-bit DACs in 16-lead TSSOP
A version: ±1 LSB INL; B version: ±0.625 LSB INL
AD5316: 4 buffered, 10-bit DACs in 16-lead TSSOP
A version: ±4 LSB INL; B version: ±2.5 LSB INL
AD5326: 4 buffered, 12-bit DACs in 16-lead TSSOP
A version: ±16 LSB INL; B version: ±10 LSB INL
Low power operation: 400 μA @ 3 V, 500 μA @ 5 V
2-wire (I2C®-compatible) serial interface
2.5 V to 5.5 V power supply
Guaranteed monotonic by design over all codes
Power-down to 90 nA @ 3 V, 300 nA @ 5 V (PD pin or bit)
Double-buffered input logic
Buffered/unbuffered reference input options
Output range: 0 V to VREF or 0 V to 2 VREF
Power-on reset to 0 V
Simultaneous update of outputs (LDAC pin)
Software clear facility
Data readback facility
On-chip rail-to-rail output buffer amplifiers
Temperature range −40°C to +105°C
APPLICATIONS
Portable battery-powered instruments
Digital gain and offset adjustment
Programmable voltage and current sources
Programmable attenuators
Industrial process control
FUNCTIONAL BLOCK DIAGRAM
VDD
VREFA VREFB
AD5306/AD5316/AD5326
LDAC
INPUT
REGISTER
DAC
REGISTER
STRING BUFFER
DAC A
VOUTA
SCL
SDA
A1
A0
LDAC
INTERFACE
LOGIC
POWER-ON
RESET
INPUT
REGISTER
DAC
REGISTER
STRING BUFFER
DAC B
VOUTB
INPUT
REGISTER
DAC
REGISTER
STRING BUFFER
DAC C
VOUTC
INPUT
REGISTER
DAC
REGISTER
STRING BUFFER
DAC D
VOUTD
VREFD VREFC
POWER-DOWN
LOGIC
PD GND
Figure 1.
GENERAL DESCRIPTION
The AD5306/AD5316/AD53261 are quad 8-/10-/12-bit buffered
voltage output DACs in 16-lead TSSOP packages that operate
from a single 2.5 V to 5.5 V supply, consuming 500 μA at 3 V.
Their on-chip output amplifiers allow rail-to-rail output swing
with a slew rate of 0.7 V/μs. A 2-wire serial interface, which
operates at clock rates up to 400 kHz, is used. This interface is
SMBus-compatible at VDD < 3.6 V. Multiple devices can be
placed on the same bus.
Each DAC has a separate reference input that can be configured
as buffered or unbuffered. The outputs of all DACs can be
updated simultaneously using the asynchronous LDAC input.
The parts incorporate a power-on reset circuit that ensures the
DAC outputs power up to 0 V and remain there until a valid
write to the device takes place. The software clear function
clears all DACs to 0 V. The parts contain a power-down feature
that reduces the current consumption of the device to
300 nA @ 5 V (90 nA @ 3 V).
All three parts have the same pinout, which allows users to select
the amount of resolution appropriate for their application without
redesigning their circuit board.
1 Protected by U.S. Patent Numbers 5,969,657 and 5,684,481.
Rev. F
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 © 2005 Analog Devices, Inc. All rights reserved.
1 page  
AD5306/AD5316/AD5326
AC CHARACTERISTICS
VDD = 2.5 V to 5.5 V; RL = 2 kΩ to GND; CL = 200 pF to GND; all specifications TMIN to TMAX, unless otherwise noted.
Table 2.
Parameter3
Output Voltage Settling Time
AD5306
AD5316
AD5326
Slew Rate
Major-Code Change Glitch Energy
Digital Feedthrough
Digital Crosstalk
Analog Crosstalk
DAC-to-DAC Crosstalk
Multiplying Bandwidth
Total Harmonic Distortion
Min
A, B Versions1, 2
Typ Max
68
79
8 10
0.7
12
0.5
0.5
1
3
200
−70
Unit Conditions/Comments
VREF = VDD = 5 V
μs 1/4 scale to 3/4 scale change (0x40 to 0xC0)
μs 1/4 scale to 3/4 scale change (0x100 to 0x300)
μs 1/4 scale to 3/4 scale change (0x400 to 0xC00)
V/μs
nV-s 1 LSB change around major carry
nV-s
nV-s
nV-s
nV-s
kHz VREF = 2 V ± 0.1 V p-p, unbuffered mode
dB VREF = 2.5 V ± 0.1 V p-p, frequency = 10 kHz
1 Guaranteed by design and characterization; not production tested.
2 Temperature range (A, B versions): −40°C to +105°C; typical at +25°C.
3 See the Terminology section.
Rev. F | Page 5 of 24
5 Page 
TYPICAL PERFORMANCE CHARACTERISTICS
1.0
TA = 25°C
VDD = 5V
0.5
0
–0.5
–1.0
0
50 100 150
CODE
Figure 6. AD5306 INL
200
250
3
TA = 25°C
VDD = 5V
2
1
0
–1
–2
–3
0
200 400 600 800 1000
CODE
Figure 7. AD5316 INL
12
TA = 25°C
VDD = 5V
8
4
0
–4
–8
–12
0
500 1000 1500 2000 2500 3000 3500 4000
CODE
Figure 8. AD5326 INL
AD5306/AD5316/AD5326
0.3
TA = 25°C
VDD = 5V
0.2
0.1
0
–0.1
–0.2
–0.3
0
50 100 150
CODE
Figure 9. AD5306 DNL
200
250
0.6
TA = 25°C
VDD = 5V
0.4
0.2
0
–0.2
–0.4
–0.6
0
200 400 600
CODE
Figure 10. AD5316 DNL
800
1000
1.0
TA = 25°C
VDD = 5V
0.5
0
–0.5
–1.0
0
500 1000 1500 2000 2500 3000 3500 4000
CODE
Figure 11. AD5326 DNL
Rev. F | Page 11 of 24
11 Page | ||
| Páginas | Total 24 Páginas | |
| PDF Descargar | [ Datasheet AD5306.PDF ] | |
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