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AD5232 Schematic ( PDF Datasheet ) - Analog Devices

Teilenummer AD5232
Beschreibung Dual 256-Position Digital Potentiometer
Hersteller Analog Devices
Logo Analog Devices Logo 




Gesamt 24 Seiten
AD5232 Datasheet, Funktion
Data Sheet
Nonvolatile Memory,
Dual 256-Position Digital Potentiometer
AD5232
FEATURES
Dual-channel, 256-position resolution
10 kΩ, 50 kΩ, and 100 kΩ nominal terminal resistance
Nonvolatile memory maintenance of wiper settings
Predefined linear increment/decrement instructions
Predefined ±6 dB step log taper increment/decrement
instructions
SPI-compatible serial interface
Wiper settings and EEMEM readback
3 V to 5 V single-supply operation
±2.5 V dual-supply operation
14 bytes of general-purpose user EEMEM
Permanent memory write protection
100-year typical data retention (TA = 55°C)
APPLICATIONS
Mechanical potentiometer replacement
Instrumentation: gain and offset adjustment
Programmable voltage-to-current conversion
Programmable filters, delays, and time constants
Programmable power supply
Low resolution DAC replacement
Sensor calibration
GENERAL DESCRIPTION
The AD5232 device provides a nonvolatile, dual-channel,
digitally controlled variable resistor (VR) with 256-position
resolution. This device performs the same electronic adjustment
function as a mechanical potentiometer with enhanced resolution,
solid state reliability, and superior low temperature coefficient
performance. The versatile programming of the AD5232, per-
ormed via a microcontroller, allows multiple modes of operation
and adjustment.
In the direct program mode, a predetermined setting of the RDAC
registers (RDAC1 and RDAC2) can be loaded directly from the
microcontroller. Another important mode of operation allows
the RDACx register to be refreshed with the setting previously
stored in the corresponding EEMEM register (EEMEM1 and
EEMEM2). When changes are made to the RDACx register to
establish a new wiper position, the value of the setting can be
saved into the EEMEMx register by executing an EEMEM save
operation. After the settings are saved in the EEMEMx register,
these values are automatically transferred to the RDACx register
to set the wiper position at system power-on. Such operation is
enabled by the internal preset strobe. The preset strobe can also
be accessed externally.
Rev. C
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
FUNCTIONAL BLOCK DIAGRAM
VDD
CS
CLK
SDI
SDO
ADDR
DECODE
SERIAL
INTERFACE
RDAC1
REGISTER
EEMEM1
AD5232
RDAC1
A1
W1
B1
POWER-ON
PR RESET
WP
RDY
EEMEM
CONTROL
RDAC2
REGISTER
EEMEM2
14 BYTES
USER
EEMEM
RDAC2
A2
W2
B2
GND
Figure 1.
VSS
All internal register contents can be read via the serial data
output (SDO). This includes the RDAC1 and RDAC2 registers,
the corresponding nonvolatile EEMEM1 and EEMEM2 registers,
and the 14 spare USER EEMEM registers that are available for
constant storage.
The basic mode of adjustment is the increment and decrement
command instructions that control the wiper position setting
register (RDACx). An internal scratch pad RDACx register can
be moved up or down one step of the nominal resistance between
Terminal A and Terminal B. This step adjustment linearly changes
the wiper to Terminal B resistance (RWB) by one position segment
of the device’s end-to-end resistance (RAB). For exponential/
logarithmic changes in wiper setting, a left/right shift command
instruction adjusts the levels in ±6 dB steps, which can be useful
for audio and light alarm applications.
The AD5232 is available in a thin, 16-lead TSSOP package.
All parts are guaranteed to operate over the extended industrial
temperature range of −40°C to +85°C. An evaluation board, the
EVAL-AD5232-10EBZ, is available.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2001–2013 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com






AD5232 Datasheet, Funktion
AD5232
Timing Diagrams
CS
CPHA = 1
CLK
CPOL = 1
t2
HIGH
SDI OR LOW
t8
SDO
B16*
t1
t5 B15
t4
B15
(MSB)
B15
(MSB)
t7
t6
t10
Data Sheet
t3
B0
t12
t13
t17
B0
(LSB)
t11
B0
(LSB)
t9
HIGH
OR LOW
RDY
t14
t15
t16
NOTES
1. B24 IS AN EXTRA BIT THAT IS NOT DEFINED, BUT IT IS USUALLY THE LSB OF THE CHARACTER THAT WAS PREVIOUSLY TRANSMITTED.
2. THE CPOL = 1 MICROCONTROLLER COMMAND ALIGNS THE INCOMING DATA TO THE POSITIVE EDGE OF THE CLOCK.
Figure 2. CPHA = 1
CS
CLK
CPOL = 0
HIGH
OR LOW
SDI
B15
(MSB)
t2
B15
(MSB IN)
t1
B15 t5
t4
t6
t7
t8 t10
SDO
B15
(MSB OUT)
CPHA = 0
B0
(LSB)
B0
B0
(LSB)
t11
B0
(LSB)
t12
t3 t13
t17
HIGH
OR LOW
t9
*
RDY
t14
t15
NOTES
1. THIS EXTRA BIT IS NOT DEFINED, BUT IT IS USUALLY THE MSB OF THE CHARACTER THAT WAS JUST RECEIVED.
2. THE CPOL = 0 MICROCONTROLLER COMMAND ALIGNS THE INCOMING DATA TO THE POSITIVE EDGE OF THE CLOCK.
Figure 3. CPHA = 0
t16
Rev. C | Page 6 of 24

6 Page









AD5232 pdf, datenblatt
AD5232
Data Sheet
TEST CIRCUITS
Figure 22 to Figure 32 define the test conditions that are used in the Specifications section.
NC
DUT
A
W
B
IW
VMS
NC = NO CONNECT
A DUT B
VIN
OFFSET
GND
5V
W
OP279
OFFSET BIAS
VOUT
Figure 22. Resistor Position Nonlinearity Error (Rheostat Operation; R-INL, R-DNL)
Figure 26. Inverting Gain
DUT
V+ = VDD
A 1LSB = V+/2N
V+ W
B VMS
Figure 23. Potentiometer Divider Nonlinearity Error (INL, DNL)
5V
OFFSET
GND
VIN
W
OP279
A DUT B
OFFSET BIAS
Figure 27. Noninverting Gain
VOUT
VMS2
DUT
A
W
B
IW = VDD/RNOMINAL
VW
VMS1 RW = [VMS1 – VMS2]/IW
Figure 24. Wiper Resistance
VA
V+ ~
VDD
A
W
B
VMS
V+ = VDD ± 10%
( )PSRR (dB) = 20 LOG
ΔVMS
ΔVDD
PSS (%/%) =
ΔVMS%
ΔVDD%
Figure 25. Power Supply Sensitivity (PSS, PSRR)
VIN
OFFSET
GND
A
DUT
B
W
2.5V
+15V
OP42
–15V
Figure 28. Gain vs. Frequency
VOUT
DUT
AW
B
A = NC
RSW
=
0.1V
ISW
CODE = 0x00
+
ISW
0.1V
VSS TO VDD
Figure 29. Incremental On Resistance
Rev. C | Page 12 of 24

12 Page





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