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AD5231 Schematic ( PDF Datasheet ) - Analog Devices

Teilenummer AD5231
Beschreibung 1024-Position Digital Potentiometer
Hersteller Analog Devices
Logo Analog Devices Logo 




Gesamt 28 Seiten
AD5231 Datasheet, Funktion
Data Sheet
Nonvolatile Memory,
1024-Position Digital Potentiometer
AD5231
FEATURES
1024-position resolution
Nonvolatile memory maintains wiper setting
Power-on refresh with EEMEM setting
EEMEM restore time: 140 µs typ
Full monotonic operation
10 kΩ, 50 kΩ, and 100 kΩ terminal resistance
Permanent memory write protection
Wiper setting readback
Predefined linear increment/decrement instructions
Predefined ±6 dB/step log taper increment/decrement
instructions
SPI®-compatible serial interface
3 V to 5 V single-supply or ±2.5 V dual-supply operation
28 bytes extra nonvolatile memory for user-defined data
100-year typical data retention, TA = 55°C
APPLICATIONS
Mechanical potentiometer replacement
Instrumentation: gain, offset adjustment
Programmable voltage to current conversion
Programmable filters, delays, time constants
Programmable power supply
Low resolution DAC replacement
Sensor calibration
FUNCTIONAL BLOCK DIAGRAM
CS
CLK
SDI
ADDR
DECODE
SDI
RDAC
REGISTER
AD5231
RDAC
GND
SERIAL
INTERFACE
EEMEM(0)
VDD
A
W
B
SDO
WP
RDY
PR
SDO
EEMEM
CONTROL
28 BYTES
USER EEMEM
DIGITAL
REGISTER
EEMEM(1)
Figure 1.
100
RWA
2 DIGITAL
OUTOUT
BUFFER
RWB
O1
O2
VSS
75
50
25
GENERAL DESCRIPTION
The AD5231 is a nonvolatile memory1, digitally controlled
potentiometer2 with 1024-step resolution. The device performs
the same electronic adjustment function as a mechanical
potentiometer with enhanced resolution, solid state reliability,
and remote controllability. The AD5231 has versatile programming
that uses a standard 3-wire serial interface for 16 modes of
operation and adjustment, including scratchpad programming,
memory storing and restoring, increment/decrement, ±6 dB/step
log taper adjustment, wiper setting readback, and extra EEMEM
for user-defined information, such as memory data for other
components, look-up table, or system identification information.
In scratchpad programming mode, a specific setting can be
programmed directly to the RDAC register that sets the
1 The terms nonvolatile memory and EEMEM are used interchangeably.
2 The terms digital potentiometer and RDAC are used interchangeably.
Rev. D
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Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevices for itsuse,nor foranyinfringementsofpatentsor other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
0
0 256 512 768 1023
CODE (Decimal)
Figure 2. RWA (D) and RWB (D) vs. Decimal Code
resistance between Terminals W–A and Terminals W–B. This
setting can be stored into the EEMEM and is transferred
automatically to the RDAC register during system power-on.
The EEMEM content can be restored dynamically or through
external PR strobing, and a WP function protects EEMEM
contents. To simplify the programming, the linear-step increment
or decrement commands can be used to move the RDAC wiper
up or down, one step at a time. The ±6 dB step commands can
be used to double or half the RDAC wiper setting.
The AD5231 is available in a 16-lead TSSOP. The part is
guaranteed to operate over the extended industrial temperature
range of −40°C to +85°C.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2001–2013 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com






AD5231 Datasheet, Funktion
AD5231
Timing Diagrams
CS
CPHA = 1
CLK
CPOL = 1
t2
HIGH
OR LOW
SDI
t8
SDO
B24*
t1
t5 B23
t4
B23–MSB
t7
t6
B23–MSB
t10
Data Sheet
t3
B0
t12
t13
t17
B0–LSB
t11 t9
B0–LSB
HIGH
OR LOW
RDY
t14 t15
t16
* NOT DEFINED, BUT NORMALLY LSB OF CHARACTER PREVIOUSLY TRANSMITTED.
THE CPOL = 1 MICROCONTROLLER COMMAND ALIGNS THE INCOMING DATA TO THE POSITIVE EDGE OF THE CLOCK.
Figure 3. CPHA = 1 Timing Diagram
CS
CLK
CPOL = 0
HIGH
OR LOW
SDI
t1
t2 B23 t5
t4
B23–MSB IN
t6
CPHA = 0
t3
B0
t12
t13
t17
B0–LSB
HIGH
OR LOW
SDO
RDY
t8 t10
B23–MSB OUT
t14
t7
t11
B0–LSB
t9
*
t15
t16
* NOT DEFINED, BUT NORMALLY MSB OF CHARACTER PREVIOUSLY RECEIVED.
THE CPOL = 0 MICROCONTROLLER COMMAND ALIGNS THE INCOMING DATA TO THE POSITIVE EDGE OF THE CLOCK.
Figure 4. CPHA = 0 Timing Diagram
Rev. D | Page 6 of 28

6 Page









AD5231 pdf, datenblatt
AD5231
5V/DIV
CS
CLK
5V/DIV
SDI
5V/DIV
IDD*
2mA/DIV
4ms/DIV
*SUPPLY CURRENT RETURNS TO MINIMUM POWER CONSUMPTION
IF INSTRUCTION 0 (NOP) IS EXECUTED IMMEDIATELY AFTER
INSTRUCTION 1 (READ EEMEM).
Figure 24. IDD vs. Time when Restoring Data from EEMEM
Data Sheet
100
VA = VB = OPEN
TA = 25°C
10
RAB = 10kΩ
1
RAB = 50kΩ
0.1
RAB = 100kΩ
0.01
0
128 256 384 512 640 768 896 1024
CODE (Decimal)
Figure 25. IWB_MAX vs. Code
Rev. D | Page 12 of 28

12 Page





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