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PDF AD5204 Data sheet ( Hoja de datos )
| Número de pieza | AD5204 | |
| Descripción | 4-/6-Channel Digital Potentiometers | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de AD5204 (archivo pdf) en la parte inferior de esta página. Total 11 Páginas | ||
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FEATURES
256 Position
Multiple Independently Programmable Channels
AD5204—4-Channel
AD5206—6-Channel
Potentiometer Replacement
10 k⍀, 50 k⍀, 100 k⍀
3-Wire SPI-Compatible Serial Data Input
+2.7 V to +5.5 V Single Supply; ؎2.7 V Dual Supply
Operation
Power ON Midscale Preset
APPLICATIONS
Mechanical Potentiometer Replacement
Instrumentation: Gain, Offset Adjustment
Programmable Voltage-to-Current Conversion
Programmable Filters, Delays, Time Constants
Line Impedance Matching
4-/6-Channel
Digital Potentiometers
AD5204/AD5206
FUNCTIONAL BLOCK DIAGRAMS
CS
CLK
SDO
A2
A1
DO A0
D7
EN
ADDR
DEC
SER
REG
SDI
GND
DI D0
POWER-
ON
PRESET
8
AD5204
D7
RDAC
LATCH
#1
D0 R
D7
RDAC
LATCH
#4
D0
R
VDD
A1
W1
B1
A4
W4
B4
SHDN
VSS
PR
GENERAL DESCRIPTION
The AD5204/AD5206 provides four-/six-channel, 256 position
digitally-controlled Variable Resistor (VR) devices. These de-
vices perform the same electronic adjustment function as a
potentiometer or variable resistor. Each channel of the AD5204/
AD5206 contains a fixed resistor with a wiper contact that taps
the fixed resistor value at a point determined by a digital code
loaded into the SPI-compatible serial-input register. The resis-
tance between the wiper and either endpoint of the fixed resistor
varies linearly with respect to the digital code transferred into
the VR latch. The variable resistor offers a completely program-
mable value of resistance between the A terminal and the wiper
or the B Terminal and the wiper. The fixed A-to-B terminal
resistance of 10 kΩ, 50 kΩ, or 100 kΩ has a nominal tempera-
ture coefficient of 700 ppm/°C.
Each VR has its own VR latch which holds its programmed
resistance value. These VR latches are updated from an internal
serial-to-parallel shift register that is loaded from a standard
3-wire serial-input digital interface. Eleven data bits make up
the data word clocked into the serial input register. The first
three bits are decoded to determine which VR latch will be
loaded with the last eight bits of the data word when the CS
strobe is returned to logic high. A serial data output pin at
the opposite end of the serial register (AD5204 only) allows
simple daisy-chaining in multiple VR applications without
additional external decoding logic.
CS
CLK
EN
A2
A1
ADDR
DEC
A0
D7
SER
REG
SDI
GND
DI D0
POWER-
ON
PRESET
8
AD5206
D7
RDAC
LATCH
#1
D0 R
D7
RDAC
LATCH
#6
D0 R
VDD
A1
W1
B1
A6
W6
B6
VSS
An optional reset (PR) pin forces all the AD5204 wipers to the
midscale position by loading 80H into the VR latch.
The AD5204/AD5206 is available in both surface mount
(SOL-24), TSSOP-24 and the 24-lead plastic DIP package. All
parts are guaranteed to operate over the extended industrial
temperature range of –40°C to +85°C. For additional single,
dual, and quad channel devices, see the AD8400/AD8402/
AD8403 products.
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 1999
1 page  
AD5204 PIN CONFIGURATION
AD5204/AD5206
AD5206 PIN CONFIGURATION
NC 1
NC 2
GND 3
CS 4
PR 5
VDD 6
SHDN 7
SDI 8
CLK 9
SDO 10
VSS 11
NC 12
AD5204
(NOT TO
SCALE)
24 B4
23 W4
22 A4
21 B2
20 W2
19 A2
18 A1
17 W1
16 B1
15 A3
14 W3
13 B3
NC = NO CONNECT
A6 1
W6 2
B6 3
GND 4
CS 5
VDD 6
SDI 7
CLK 8
VSS 9
B5 10
W5 11
A5 12
AD5206
(NOT TO
SCALE)
24 B4
23 W4
22 A4
21 B2
20 W2
19 A2
18 A1
17 W1
16 B1
15 A3
14 W3
13 B3
AD5204 PIN FUNCTION DESCRIPTIONS
AD5206 PIN FUNCTION DESCRIPTIONS
Pin
No. Name
1, 2,
12 NC
3 GND
4 CS
5 PR
6 VDD
7 SHDN
8 SDI
9 CLK
10 SDO
11 VSS
13 B3
14 W3
15 A3
16 B1
17 W1
18 A1
19 A2
20 W2
21 B2
22 A4
23 W4
24 B4
Description
Pin
No. Name
Not Connected.
Ground.
Chip Select Input, Active Low. When CS
returns high, data in the serial input register
is decoded based on the address bits and
loaded into the target RDAC latch.
Active low preset to midscale; sets RDAC
registers to 80H.
Positive power supply, specified for
operation at both +3 V or +5 V. (Sum of
|VDD| + |VSS| <5.5 V.)
Active low input. Terminal A open-circuit.
Shutdown controls Variable Resistors #1
through #4.
Serial Data Input. MSB First.
Serial Clock Input, positive edge triggered.
Serial Data Output, Open Drain transistor
requires pull-up resistor.
Negative Power Supply, specified for
operation at both 0 V or –2.7 V. (Sum of
|VDD| + |VSS| <5.5 V.)
B Terminal RDAC #3.
Wiper RDAC #3, addr = 0102.
A Terminal RDAC #3.
B Terminal RDAC #1.
Wiper RDAC #1, addr = 0002.
A Terminal RDAC #1.
A Terminal RDAC #2.
Wiper RDAC #2, addr = 0012.
B Terminal RDAC #2.
A Terminal RDAC #4.
Wiper RDAC #4, addr = 0112.
B Terminal RDAC #4.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
A6
W6
B6
GND
CS
VDD
SDI
CLK
VSS
B5
W5
A5
B3
W3
A3
B1
W1
A1
A2
W2
B2
A4
W4
B4
Description
A Terminal RDAC #6.
Wiper RDAC #6, addr = 1012.
B Terminal RDAC #6.
Ground.
Chip Select Input, Active Low. When CS
returns high, data in the serial input register
is decoded based on the address bits and
loaded into the target RDAC latch.
Positive power supply, specified for
operation at both +3 V or +5 V. (Sum of
|VDD| + |VSS| <5.5 V.)
Serial Data Input. MSB First.
Serial Clock Input, positive edge triggered.
Negative Power Supply, specified for
operation at both 0 V or –2.7 V. (Sum of
|VDD| + |VSS| <5.5 V.)
B Terminal RDAC #5.
Wiper RDAC #5, addr = 1002.
A Terminal RDAC #5.
B Terminal RDAC #3.
Wiper RDAC #3, addr = 0102.
A Terminal RDAC #3.
B Terminal RDAC #1.
Wiper RDAC #1, addr = 0002.
A Terminal RDAC #1.
A Terminal RDAC #2.
Wiper RDAC #2, addr = 0012.
B Terminal RDAC #2.
A Terminal RDAC #4.
Wiper RDAC #4, addr = 0112.
B Terminal RDAC #4.
REV. 0
–5–
5 Page 
REV. 0
AD5204/AD5206
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
24-Lead Narrow Body PDIP
(N-24)
1.275 (32.30)
1.125 (28.60)
24
1
PIN 1
0.210
(5.33)
MAX
0.200 (5.05)
0.125 (3.18)
0.022 (0.558)
0.014 (0.356)
0.100
(2.54)
BSC
13 0.280 (7.11)
12 0.240 (6.10)
0.325 (8.25)
0.300 (7.62)
0.060 (1.52)
0.015 (0.38)
0.195 (4.95)
0.150
(3.81)
MIN
0.070 (1.77) SEATING
0.045 (1.15) PLANE
0.115 (2.93)
0.015 (0.381)
0.008 (0.204)
24-Lead SOIC
(R-24/SOL-24)
0.6141 (15.60)
0.5985 (15.20)
24 13
0.2992 (7.60)
0.2914 (7.40)
0.4193 (10.65)
1 12 0.3937 (10.00)
PIN 1
0.1043 (2.65)
0.0926 (2.35)
0.0291 (0.74)
0.0098 (0.25)؋ 45؇
0.0118 (0.30) 0.0500
0.0040 (0.10)
(1.27)
BSC
8؇
0.0192 (0.49)
0.0138 (0.35)
SEATING
PLANE
0.0125 (0.32) 0؇
0.0091 (0.23)
0.0500 (1.27)
0.0157 (0.40)
24-Lead Thin Shrink SO Package (TSSOP)
(RU-24)
0.311 (7.90)
0.303 (7.70)
24
1
PIN 1
0.006 (0.15)
0.002 (0.05)
13
0.177 (4.50)
0.169 (4.30)
0.256 (6.50)
0.246 (6.25)
12
0.0433 (1.10)
MAX
SEATING
PLANE
8؇
0.0256 (0.65)
BSC
0.0118 (0.30)
0.0075 (0.19)
0.0079 (0.20) 0؇
0.0035 (0.090)
0.028 (0.70)
0.020 (0.50)
–11–
11 Page | ||
| Páginas | Total 11 Páginas | |
| PDF Descargar | [ Datasheet AD5204.PDF ] | |
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