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PDF AD7533 Data sheet ( Hoja de datos )
| Número de pieza | AD7533 | |
| Descripción | 8-Bit/ Multiplying D/A Converters | |
| Fabricantes | Intersil Corporation | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de AD7533 (archivo pdf) en la parte inferior de esta página. Total 9 Páginas | ||
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AD7523, AD7533
August 1997
8-Bit, Multiplying D/A Converters
Features
Description
• 8-Bit, 9-Bit and 10-Bit Linearity
• Low Gain and Linearity Temperature Coefficients
• Full Temperature Range Operation
• Static Discharge Input Protection
• TTL/CMOS Compatible
• Supply Range . . . . . . . . . . . . . . . . . . . . . . . . +5V to +15V
• Fast Settling Time at 25oC . . . . . . . . . . . . 150ns (Max)
• Four Quadrant Multiplication
• AD7533 Direct AD7520 Equivalent
The AD7523 and AD7533 are monolithic, low cost, high
performance, 8-bit and 10-bit accurate, multiplying digital-to-
analog converter (DAC), in a 16 pin DIP.
Intersil’ thin film resistors on CMOS circuitry provide 10-bit
resolution (8-bit, 9-bit and 10-bit accuracy), with TTL/CMOS
compatible operation.
The AD7523 and AD7533s accurate four quadrant
multiplication, full military temperature range operation, full
input protection from damage due to static discharge by
clamps to V+ and GND, and very low power dissipation
make it a very versatile converter.
Low noise audio gain controls, motor speed controls,
digitally controlled gain and digital attenuators are a few of
the wide range of applications of the AD7523 and AD7533.
Ordering Information
PART NUMBER
LINEARITY (INL, DNL)
AD7523JN, AD7533JN
0.2% (8-Bit)
AD7523KN, AD7533KN
0.1% (9-Bit)
AD7523LN, AD7533LN
0.05% (10-Bit)
TEMP. RANGE (oC)
PACKAGE
0 to 70
16 Ld PDIP
0 to 70
16 Ld PDIP
0 to 70
16 Ld PDIP
PKG. NO.
E16.3
E16.3
E16.3
Pinout
AD7523, AD7533
(PDIP)
TOP VIEW
IOUT1 1
IOUT2 2
GND 3
BIT 1 (MSB) 4
BIT 2 5
BIT 3 6
BIT 4 7
BIT 5 8
16 RFEEDBACK
15 VREF IN
14 V+
NC/BIT 10
13 (NOTE 1)
12 NC/BIT 9
(NOTE 1)
11 BIT 8
10 BIT 7
9 BIT 6
Functional Block Diagram
VREF IN
(15)
20kΩ
10kΩ
20kΩ
10kΩ
20kΩ
10kΩ
20kΩ
SPDT
NMOS
SWITCHES
MSB
(4)
BIT 2
(5)
BIT 3
(6)
10kΩ
20kΩ
20kΩ
(3)
10kΩ
IOUT2 (2)
IOUT1 (1)
RFEEDBACK
(16)
NOTE:
1. NC for AD7523 only.
NOTE: Switches shown for digital inputs “High”
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
10-8
File Number 3105.1
1 page  
AD7523, AD7533
Unipolar Binary Operation - AD7533 (10-Bit DAC)
The circuit configuration for operating the AD7533 in
unipolar mode is shown in Figure 2. With positive and
negative VREF values the circuit is capable of 2-Quadrant
multiplication. The “Digital Input Code/Analog Output Value”
table for unipolar mode is given in Table 2.
TABLE 2. UNlPOLAR BINARY CODE - AD7533
DIGITAL INPUT
MSB LSB
1111111111
1000000001
(NOTE 1)
NOMINAL ANALOG OUTPUT
–VREF11----00---22----34-
–VREF1--5--0--1-2--3--4-
1000000000
–VREF1--5--0--1-2--2--4-
=
–V-----R----E----F-
2
0111111111
–VREF1--5--0--1-2--1--4-
0000000001
–VREF1----0--1-2----4-
0000000000
–VREF1----0--0-2----4- = 0
NOTES:
1. VOUT as shown in the Functional Diagram.
2. Nominal Full Scale for the circuit of Figure 2 is given by:
FS = –VREF11----00---22----34- .
3. Nominal LSB magnitude for the circuit of Figure 2 is given by:
LSB = VREF1----0--1-2----4- .
Zero Offset Adjustment
1. Connect all digital inputs to GND.
2. Adjust the offset zero adjust trimpot of the output
operational amplifier for 0V ±1mV (Max) at VOUT.
Gain Adjustment
1. Connect all digital inputs to V+.
2. Monitor VOUT for a -VREF (1 - 1/210) reading.
3. To increase VOUT, connect a series resistor, R2, (0Ω to
250Ω) in the IOUT1 amplifier feedback loop.
4. To decrease VOUT, connect a series resistor, R1, (0Ω to
250Ω) between the reference voltage and the VREF
terminal.
Bipolar (Offset Binary) Operation - AD7523
The circuit configuration for operating the AD7523 in the
bipolar mode is given in Figure 3. Using offset binary digital
input codes and positive and negative reference voltage
values, Four-Quadrant multiplication can be realized. The
“Digital Input Code/Analog Output Value” table for bipolar
mode is given in Table 3.)
A “Logic 1” input at any digital input forces the corresponding
ladder switch to steer the bit current to IOUT1 bus. A “Logic
0” input forces the bit current to IOUT2 bus. For any code the
IOUT1 and IOUT2 bus currents are complements of one
another. The current amplifier at IOUT2 changes the polarity
of IOUT2 current and the transconductance amplifier at IOUT
output sums the two currents. This configuration doubles the
output range. The difference current resulting at zero offset
binary code, (MSB = “Logic 1”, all other bits = “Logic 0”), is
corrected by suing an external resistor, (10MΩ), from VREF
to IOUT2 (Figure 3).
TABLE 3. BlPOLAR (OFFSET BINARY) CODE - AD7523
DIGITAL INPUT
MSB LSB
11111111
10000001
ANALOG OUTPUT
– VR E F 11----22---78--
– VR E F 1----21---8--
10000000
0
01111111
+V R E F 1----21---8--
00000001
+V R E F 11----22---78--
00000000
+V R E F 11----22---88--
NOTE:
1. 1 LSB = (2–7)(VREF) = 1----12---8--(VREF) .
±10V +15V
VREF
R1
DATA
INPUTS
MSB
LSB
15 14
4 16
AD7523/ 1
AD7533
13 3 2
RFEEDBACK
IOUT1
IOUT2 R4 5K
R6 10MΩ
-
CR2
6
+
R2
R3 5K
CR1
-
6
+
VOUT
FIGURE 3. BIPOLAR OPERATION (4-QUADRANT MULTIPLICATION)
10-12
5 Page | ||
| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet AD7533.PDF ] | |
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