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PDF AD711 Data sheet ( Hoja de datos )
| Número de pieza | AD711 | |
| Descripción | BiFET Op Amp | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de AD711 (archivo pdf) en la parte inferior de esta página. Total 8 Páginas | ||
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FEATURES
Dynamic Range: 88.5 dB
Resolution: 0.375 dB
On-Chip Data Latches
+5 V Operation
AD7111A Pin Compatible with AD7524
Low Power
APPLICATIONS
Audio Attenuators
Sonar Systems
Function Generators
Digitally Controlled AGC System
LC2MOS LOGDAC
Logarithmic D/A Converter
AD7111/AD7111A
FUNCTIONAL BLOCK DIAGRAMS
VDD
VIN
AD7111
17-BIT DAC
RFB
I OUT
AGND
17-BIT LATCH
DECODE LOGIC
GENERAL DESCRIPTION
The LOGDAC® AD7111/AD7111A are monolithic multiplying
D/A converters featuring wide dynamic range in a small pack-
age. Both DACs can attenuate an analog input signal over the
range 0 dB to 88.5 dB in 0.375 dB steps. They are available in
16-pin DIPs and SOIC packages. The AD7111 is also available
in a 20-terminal LCCC package.
The degree of attenuation across the DAC is determined by an
8-bit word applied to the onboard decode logic. This 8-bit word
is decoded into a 17-bit word which is then applied to a 17-bit
R-2R ladder. The very fine step resolution, which is available
over the entire dynamic range, is due to the use of this 17-bit
DAC.
The AD7111/AD7111A are easily interfaced to a standard 8-bit
MPU bus via an 8-bit data port and standard microprocessor
control lines. The AD7111 WR input is edge triggered and re-
quires a rising edge to load new data to the DAC. The AD7111A
WR is level triggered to allow transparent operation of the
latches, if required. It should also be noted that the AD7111A is
exactly pin and function-compatible with the AD7524, an in-
dustry standard 8-bit multiplying DAC. This allows an easy up-
grading of existing AD7524 designs which would benefit both
from the wider dynamic range and the finer step resolution of-
fered by the AD7111A.
The AD7111/AD7111A are fabricated in Linear Compatible
CMOS (LC2MOS), an advanced, mixed technology process that
combines precision bipolar circuits with low power CMOS logic.
LOGDAC is a registered trademark of Analog Devices, Inc.
CONTROL LOGIC
8-BIT BUFFER
CS WR
VDD
VIN
D0 – D7
AD7111A
17-BIT DAC
DGND
RFB
I OUT
AGND
17-BIT LATCH
DECODE LOGIC
CONTROL LOGIC
8-BIT BUFFER
CS WR
D0 – D7
DGND
PRODUCT HIGHLIGHTS
1. Wide Dynamic Range: 0 dB to 88.5 dB attenuation range in
0.375 dB steps.
2. Small Package: The AD7111/AD7111A are available in
16-pin DIPs and SOIC packages.
3. Transparent Latch Operation: By tying the CS and WR in-
puts low, the DAC latches in the AD7111A can be made
transparent.
4. Fast Microprocessor Interface: Data setup times of 25 ns and
write pulse width of 57 ns make the AD7111A compatible
with modern microprocessors.
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
Fax: 617/326-8703
1 page  
AD7111/AD7111A
PIN CONFIGURATIONS
DIP/SOIC
LCCC
Write Cycle Timing Diagram
CIRCUIT DESCRIPTION
GENERAL CIRCUIT DESCRIPTION
The AD7111/AD7111A consists of a 17-bit R-2R CMOS mul-
tiplying D/A converter with extensive digital logic. The logic
translates the 8-bit binary input into a 17-bit word which is
used to drive the D/A converter. Input data on the D7-D0 bus
is loaded into the input data latches using CS and WR control
signals. When using the AD7111, the rising edge of WR latches
the input data and initiates the internal data transfer to the de-
coder. A minimum time tRFSH, the refresh time, is required for
the data to propagate through the decoder before a new data
write is attempted.
In contrast, the AD7111A WR input is level triggered to allow
transparent operation of the latches if required.
The transfer function for the circuit of Figure 1 is given by:
0. 375 N
VO = –VIN 10 exp – 20
VO
or VIN dB = –0.375 N
where 0.375 is the step size (resolution) in dB and N is the in-
put code in decimal for values 0 to 239. For 240 ≤ N ≤ 255 the
output is zero. Table I gives the output attenuation relative to
0 dB for all possible input codes.
Figure 1. Typical Circuit Configuration
The graphs on the last page give a pictorial representation of the
specified accuracy and monotonic ranges for all grades of the
AD7111/AD7111A. High attenuation levels are specified with
less accuracy than low attenuation levels. The range of mono-
tonic behavior depends upon the attenuation step size used.
Table I. Ideal Attenuation in dB vs. Input Code
D3-D0
D7-D4 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111
0000
0001
0010
0011
0.0 0.375 0.75 1.125 1.5 1.875 2.25 2.625 3.0 3.375 3.75 4.125 4.5 4.875 5.25 5.625
6.0 6.375 6.75 7.125 7.5 7.875 8.25 8.625 9.0 9.375 9.75 10.125 10.5 10.875 11.25 11.625
12.0 12.375 12.75 13.125 13.5 13.875 14.25 14.625 15.0 15.375 15.75 16.125 16.5 16.875 17.25 17.625
18.0 18.375 18.75 19.125 19.5 19.875 20.25 20.625 21.0 21.375 21.75 22.125 22.5 22.875 23.25 23.625
0100
0101
0110
0111
24.0 24.375 24.75 25.125 25.5 25.875 26.25 26.625 27.0 27.375 27.75 28.125 28.5 28.875 29.25 29.625
30.0 30.375 30.75 31.125 31.5 31.875 32.25 32.625 33.0 33.375 33.75 34.125 34.5 34.875 35.25 35.625
36.0 36.375 36.75 37.125 37.5 37.875 38.25 38.625 39.0 39.375 39.75 40.125 40.5 40.875 41.25 41.625
42.0 42.375 42.75 43.125 43.5 43.875 44.25 44.625 45.0 45.375 45.75 46.125 46.5 46.875 47.25 47.625
1000
1001
1010
1011
48.0 48.375 48.75 49.125 49.5 49.875 50.25 50.625 51.0 51.375 51.75 52.125 52.5 52.875 53.25 53.625
54.0 54.375 54.75 55.125 55.5 55.875 56.25 56.625 57.0 57.375 57.75 58.125 58.5 58.875 59.25 59.625
60.0 60.375 60.75 61.125 61.5 61.875 62.25 62.625 63.0 63.375 63.75 64.125 64.5 64.875 65.25 65.625
66.0 66.375 66.75 67.125 67.5 67.875 68.25 68.625 69.0 69.375 69.75 70.125 70.5 70.875 71.25 71.625
1100
1101
1110
1111
72.0 72.375 72.75 73.125 73.5 73.875 74.25 74.625 75.0 75.375 75.75 76.125 76.5 76.875 77.25 77.625
78.0 78.375 78.75 79.125 79.5 79.875 80.25 80.625 81.0 81.375 81.75 82.125 82.5 82.875 83.25 83.625
84.0 84.375 84.75 85.125 85.5 85.875 86.25 86.625 87.0 87.375 87.75 88.125 88.5 88.875 89.25 89.625
MUTE MUTE MUTE MUTE MUTE MUTE MUTE MUTE MUTE MUTE MUTE MUTE MUTE MUTE MUTE MUTE
REV. 0
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| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet AD711.PDF ] | |
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